MPC8308 datasheet(56/88 Pages) FREESCALE

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MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 1

Freescale Semiconductor

15 I2C

This section describes the DC and AC electrical characteristics for the I2C interface.

15.1

I2C DC Electrical Characteristics

Table 43 provides the DC electrical characteristics for the I2C interface.

15.2

I2C AC Electrical Specifications

Table 44 provides the AC timing parameters for the I2C interface.

Table 43. I2C DC Electrical Characteristics

At recommended operating conditions with NVDD of 3.3 V ± 0.3 V.

Parameter

Symbol

Min

Max

Unit Notes

Input high-voltage level

VIH

0.7

× NVDD NVDD + 0.3

—

Input low-voltage level

VIL

–0.3

0.3

× NVDD V—

Low-level output voltage

VOL

00.2

× NVDD V1

High-level output voltage

VOH

0.8 x NVDD

NVDD + 0.3

—

Output fall time from VIH(min) to VIL(max) with a bus capacitance from 10

to 400 pF

tI2KLKV 20 + 0.1 × CB

250

Pulse width of spikes which must be suppressed by the input filter

tI2KHKL

050

Capacitance for each I/O pin

—10

—

Input current, (0 V

≤VIN ≤ NVDD)IIN

—± 5

μA—

Notes:

1. Output voltage (open drain or open collector) condition = 3 mA sink current.

2. CB = capacitance of one bus line in pF.

3. For information on the digital filter used, see the

MPC8308 PowerQUICC II Pro Processor Reference Manual.

Table 44. I2C AC Electrical Specifications

All values refer to VIH (min) and VIL (max) levels (see Table 43).

Parameter

Symbol1

Min

Max

Unit

SCL clock frequency

fI2C

400

kHz

Low period of the SCL clock

tI2CL

1.3

—

μs

High period of the SCL clock

tI2CH

0.6

—

μs

Setup time for a repeated START condition

tI2SVKH

0.6

—

μs

Hold time (repeated) START condition (after this period, the first clock pulse is generated)

tI2SXKL

0.6

—

μs

Data setup time

tI2DVKH

100

—

Data hold time:

I2C bus devices

tI2DXKL

—

0 2

—

0.9 3

μs

Fall time of both SDA and SCL signals5

tI2CF

—

300

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