PIC12F752 datasheet(21/204 Pages) MICROCHIP

21 / 204 page

 2011 Microchip Technology Inc.

Preliminary

DS41576A-page 21

PIC12F752/HV752

2.2.2.4

PIE1 Register

The PIE1 register contains the Peripheral Interrupt

Enable bits, as shown in Register 2-4.

Note:

Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

PIE1: PERIPHERAL INTERRUPT ENABLE REGISTER 1

R/W-0

U-0

R/W-0

TMR1GIE

ADIE

—

HLTMR1IE

TMR2IE

TMR1IE

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

TMR1GIE: ADC Interrupt Enable bit

= Enables the TMR1 gate interrupt

= Disables the TMR1 gate interrupt

bit 6

ADIE: ADC Interrupt Enable bit

= Enables the ADC interrupt

= Disables the ADC interrupt

bit 5-3

Unimplemented: Read as ‘0’

bit 2

HLTMR1IE: Hardware Limit Timer1 Interrupt Enable bit

= Enables the HLTMR1 interrupt

= Disables the HLTMR1 interrupt

bit 1

TMR2IE: Timer2 Interrupt Enable bit

= Enables the Timer2 interrupt

= Disables the Timer2 interrupt

bit 0

TMR1IE: Timer1 Interrupt Enable bit

= Enables the Timer1 interrupt

= Disables the Timer1 interrupt

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