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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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PIC12F752 Datasheet(PDF) 76 Page - Microchip Technology |
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PIC12F752 Datasheet(HTML) 76 Page - Microchip Technology |
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76 / 204 page  PIC12F752/HV752 DS41576A-page 76 Preliminary 2011 Microchip Technology Inc. 10.1.5 CAPTURE DURING SLEEP Capture mode depends upon the Timer1 module for proper operation. If the Timer1 clock input source is a clock that is not disabled during Sleep, Timer1 will con- tinue to operate and Capture mode will operate during Sleep to wake the device. The T1CKI is an example of a clock source that will operate during Sleep. When the input source to Timer1 is disabled during Sleep, such as the HFINTOSC, Timer1 will not incre- ment during Sleep. When the device wakes from Sleep, Timer1 will continue from its previous state. TABLE 10-1: SUMMARY OF REGISTERS ASSOCIATED WITH CAPTURE Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page CCP1CON — — DC1B<1:0> CCP1M<3:0> 82 CCPR1L Capture/Compare/PWM Register x Low Byte (LSB) 76 CCPR1H Capture/Compare/PWM Register x High Byte (MSB) 76 INTCON GIE PEIE T0IE INTE IOCIE T0IF INTF IOCIF 20 PIE1 TMR1GIE ADIE — — — HLTMR1IE TMR2IE TMR1IE 21 PIE2 — — C2IE C1IE — COG1IE — CCP1IE 22 PIR1 TMR1GIF ADIF — — — HLTMR1IF TMR2IF TMR1IF 23 PIR2 — — C2IF C1IF — COG1IF — CCP1IF 24 T1CON TMR1CS<1:0> T1CKPS<1:0> Reserved T1SYNC —TMR1ON 65 T1GCON TMR1GE T1GPOL T1GTM T1GSPM T1GGO/ DONE T1GVAL T1GSS<1:0> 66 TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register 57* TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register 57* TRISA — — TRISA5 TRISA4 TRISA3(1) TRISA2 TRISA1 TRISA0 48 Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by Capture mode. * Page provides register information. Note 1: TRISA3 always reads ‘1’. |
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