70592C datasheet(64/314 Pages) MICROCHIP

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PIC24HJXXXGPX06A/X08A/X10A

DS70592C-page 64

5.2

RTSP Operation

The PIC24HJXXXGPX06A/X08A/X10A Flash program

memory array is organized into rows of 64 instructions

or 192 bytes. RTSP allows the user to erase a page of

memory, which consists of eight rows (512 instructions)

at a time, and to program one row or one word at a

time. Table 24-12 displays typical erase and program-

ming times. The 8-row erase pages and single row

write rows are edge-aligned, from the beginning of pro-

gram memory, on boundaries of 1536 bytes and 192

bytes, respectively.

The program memory implements holding buffers that

can contain 64 instructions of programming data. Prior

to the actual programming operation, the write data

must be loaded into the buffers in sequential order. The

instruction words loaded must always be from a group

of 64 boundary.

The basic sequence for RTSP programming is to set up

a Table Pointer, then do a series of TBLWT instructions

to load the buffers. Programming is performed by set-

ting the control bits in the NVMCON register. A total of

64 TBLWTL and TBLWTH instructions are required to

load the instructions.

All of the table write operations are single-word writes

(two instruction cycles) because only the buffers are

written. A programming cycle is required for

programming each row.

5.3

Programming Operations

A complete programming sequence is necessary for

programming or erasing the internal Flash in RTSP

mode.

The

processor stalls (waits)

until

the

programming operation is finished.

The programming time depends on the FRC accuracy

(see Table 24-19) and the value of the FRC Oscillator

Tuning register (see Register 9-4). Use the following

formula to calculate the minimum and maximum values

for the Row Write Time, Page Erase Time and Word

Write Cycle Time parameters (see Table 24-12).

EQUATION 5-1:

PROGRAMMING TIME

For example, if the device is operating at +125°C, the

FRC accuracy will be ±5%. If the TUN<5:0> bits (see

write time is equal to Equation 5-2.

EQUATION 5-2:

MINIMUM ROW WRITE

TIME

The maximum row write time is equal to Equation 5-3.

EQUATION 5-3:

MAXIMUM ROW WRITE

TIME

Setting the WR bit (NVMCON<15>) starts the

operation, and the WR bit is automatically cleared

when the operation is finished.

5.4

Control Registers

The two SFRs that are used to read and write the

program Flash memory are:

• NVMCON

• NVMKEY

The NVMCON register (Register 5-1) controls which

blocks are to be erased, which memory type is to be

programmed and the start of the programming cycle.

NVMKEY is a write-only register that is used for write

protection. To start a programming or erase sequence,

the user must consecutively write 0x55 and 0xAA to the

NVMKEY register. Refer to Section 5.3 “Programming

Operations” for further details.

7.37 MHz

FRC Accuracy

()%

FRC Tuning

()%

----------------------------------------------------------------------------------------------------------------------------

TRW

11064 Cycles

7.37 MHz

10.05

()

1 0.00375

–

()

------------------------------------------------------------------------------------------------ 1.435ms

TRW

11064 Cycles

7.37 MHz

10.05

–

()

1 0.00375

–

()

------------------------------------------------------------------------------------------------ 1.586ms

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