ATSAM3S2BA-MU datasheet(39/64 Pages) ATMEL

39 / 64 page

6500CS–ATARM–24-Jan-11

SAM3S Summary

Figure 10-3. SAM3S Power Management Controller Block Diagram

The SysTick calibration value is fixed at 8000 which allows the generation of a time base of 1 ms

with SystTick clock at 8 MHz (max HCLK/8 = 64 MHz/8).

10.7

Watchdog Timer

• 16-bit key-protected only-once-Programmable Counter

• Windowed, prevents the processor to be in a dead-lock on the watchdog access.

10.8

SysTick Timer

• 24-bit down counter

• Self-reload capability

• Flexible System timer

10.9

Real Time Timer

• Real Time Timer, allowing backup of time with different accuracies

– 32-bit free-running back-up counter

– Integrates a 16-bit programmable prescaler running on slow clock

MCK

periph_clk[..]

int

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,...,/64

HCK

Processor

Clock

Controller

Sleep Mode

Master Clock Controller

Peripherals

Clock Controller

ON/OFF

USB Clock Controller

SLCK

MAINCK

PLLACK

Prescaler

/1,/2,/4,...,/64

Programmable Clock Controller

PLLBCK

pck[..]

PLLBCK

UDPCK

ON/OFF

FCLK

SystTick

Divider

ATSAM3S2BA-MU Datasheet(PDF) 39 Page - ATMEL Corporation

ATSAM3S2BA-MU Datasheet(HTML) 39 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64

Datasheet Descarga

Enlace URL