SPIRIT1 datasheet(76/94 Pages) STMICROELECTRONICS

76 / 94 page

SPIRIT1

76/94

Doc ID 022758 Rev 3

Table 38.

Radio configuration registers (analog blocks)

Address

Bit

Field Name

Reset

R/W

Description

SYNT3

0x08

7:5

WCP[2:0]

000

R/W

Set the charge pump current

according to the VCO

frequency. See Table 24.

4:0

SYNT[25:21]

01100

SYNT[25:21], highest 5 bits of

the PLL programmable divider

The valid range depends on

fXO and REFDIV settings; for

fXO=26MHz. See Equation 2

SYNT2

0x09

7:0

SYNT[20:13]

0x84

R/W

SYNT[20:13], intermediate bits

of the PLL programmable

divider. See Equation 2

SYNT1

0x0A

7:0

SYNT[12:5]

0xEC

R/W

SYNT[12:5], intermediate bits

of the PLL programmable

divider. See Equation 2

SYNT0

0x0B

7:3

SYNT[4:0]

01010

R/W

SYNT[4:0], lowest bits of the

PLL programmable divider. See

Equation 2

2:0

001

R/W

Synthesizer band select. This

parameter selects the out-of-

loop divide factor of the

synthesizer (B in Equation 2 ).

1: 6 Band select factor for high

band

2: 8 Band select factor for high

band

3: 12 Band select factor for

middle band

4: 16 Band select factor for low

band

5: 32 Band select factor for very

low band

CHSPACE

0x0C

7:0

CH_SPACING

0xFC

R/W

Channel spacing in steps of

fXO/2

15 (~793 for f

XO = 26 MHz,

~732 for fXO = 24 MHz).

IF_OFFSET_DIG

0x0D

7:0

IF_OFFSET_DIG

0xA3

R/W

Intermediate frequency setting

for the digital shift-to-baseband

(see Section 9.4)

FC_OFFSET[1]

0x0E

7:4

Reserved

R/W

Carrier offset in steps of

fXO/2

18 and represented as 12

bits 2-complement integer. It is

added / subtracted to the

carrier frequency set by the

SYNTx register. This register

can be used to set a fixed

correction value obtained e.g.

from crystal measurements.

3:0

FC_OFFSET[11:8]

FC_OFFSET[0]

0x0F

7:0

FC_OFFSET[7:0]

R/W

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