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SPIRIT1 Datasheet(PDF) 89 Page - STMicroelectronics

No. de pieza SPIRIT1
Descripción Electrónicos  Low data rate, low power sub-1GHZ transceiver
PDF  94 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPIRIT1 Datasheet(HTML) 89 Page - STMicroelectronics

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SPIRIT1
Register table
Doc ID 022758 Rev 3
89/94
RX_PCKT_LEN[1]
0xC9
7:0
RX_PCKT_LEN1
0
R
Length (number of bytes) of the
received packet:
RX_PCKT_LEN=RX_PCKT_L
EN1 × 256 + RX_PCKT_LEN0
RX_PCKT_LEN[0]
0xCA
7:0
RX_PCKT_LEN0
0
R
CRC_FIELD[2]
0xCB
7:0
CRC2
0
R
CRC field of the received
packet, byte 2
CRC_FIELD[1]
0xCC
7:0
CRC1
0
R
CRC field of the received
packet, byte 1
CRC_FIELD[0]
0xCD
7:0
CRC0
0
R
CRC field of the received
packet, byte 0
RX_CTRL_FIELD[3]
0xCE
7:0
RX_CTRL0
0
R
Control field(s) of the received
packet, byte 0
RX_CTRL_FIELD[2]
0xCF
7:0
RX_CTRL1
0
R
Control field(s) of the received
packet, byte 1
RX_CTRL_FIELD[1]
0xD0
7:0
RX_CTRL2
0
R
Control field(s) of the received
packet, byte 2
RX_CTRL_FIELD[0]
0xD1
7:0
RX_CTRL3
0
R
Control field(s) of the received
packet, byte 3
RX_ADDR_FIELD[1]
0xD2
7:0
ADDR1
0
R
Source address field of the RX
packet.
RX_ADDR_FIELD[0]
0xD3
7:0
ADDR0
0
R
Destination address field of the
RX packet.
AES_ DATA_OUT[15]
0xD4
7:0
AES_OUT15
0
R
AES engine data output (128
bits)
AES_ DATA_OUT[14]
0xD5
7:0
AES_OUT14
0
R
AES engine data output (128
bits)
……
…
…
…
…
AES_ DATA_OUT[1]
0xE2
7:0
AES_OUT1
0
R
AES engine data output (128
bits)
AES_ DATA_OUT[0]
0xE3
7:0
AES_OUT0
0
R
AES engine data output (128
bits)
RCO_VCO_CALIBR_O
UT[1]
0xE4
7:4
RWT_OUT[3:0]
0
R
RWT word from internal RCO
calibrator
3:0
RFB_OUT[4:1]
0
RFB word from internal RCO
calibrator
RCO_VCO_CALIBR_O
UT[0]
0xE5
7RFB_OUT[0]
0
R
6:0
VCO_CALIBR_DATA
0
Output word from internal VCO
calibrator
LINEAR_FIFO_STATUS
[1]
0xE6
7
Reserved
0
R
6:0
ELEM_TXFIFO
0
Number of elements in the
linear TX FIFO (from 0 to 96
bytes)
Table 41.
Frequently used registers (continued)
Register name
Address
Bit
Field Name
Reset
R/W
Description



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