Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Mexican  ▼
ALLDATASHEET.COM.MX

X  

WM8740SEDS/V Datasheet(PDF) 20 Page - Wolfson Microelectronics plc

No. de pieza WM8740SEDS/V
Descripción Electrónicos  24-bit, High Performance 192kHz Stereo DAC
PDF  27 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  WOLFSON [Wolfson Microelectronics plc]
Página de inicio  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8740SEDS/V Datasheet(HTML) 20 Page - Wolfson Microelectronics plc

Back Button WM8740SEDS/V Datasheet HTML 16Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 17Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 18Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 19Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 20Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 21Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 22Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 23Page - Wolfson Microelectronics plc WM8740SEDS/V Datasheet HTML 24Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 20 / 27 page
background image
WM8740
Production Data
w
PD, Rev 4.4, April 2010
20
MUTE MODES
The device has various mute modes.
DIGITAL FILTER
ANALOGUE
ANRES
ANMUTE
Reg bit OPE = ‘1’
Unaffected
Asserted
MUTEB pin
Gain ramped to zero
On release volume ramps
to previous value
Asserted when
gain = 0
AUTOMUTE
(detect 1024 zero
input samples)
Automute has no effect on digital
filters
Asserted after
1024 zero input
samples if IZD = 1
Reg bit MUT
As MUTEB pin
As MUTEB pin
Gain = 00
(left and right)
Gain = -
∞dB
Asserted
RAM initialise
Gain initialised to 0dB
Asserted
Loss of system
clock
Not running (no clock). On clock
restart, filters initialised, RAM
initialised. Registers unchanged
Asserted
Asserted
No LRCLK or invalid
SCLK/LRCLK ratio
Filters initialised, RAM initialised.
Registers unchanged
Asserted
Asserted
RB
Reset – gain initialised to 0dB
Asserted
Asserted
Power-on reset
Reset
Asserted
Asserted
Table 20 Mute Modes
ANRES is the reset to the switched capacitor filter.
1.
ANMUTE is an analogue muting signal gating the analogue signal at the output (after
the SC filter)
2.
AUTOMUTE is asserted when both the IZD register bit is asserted and the input audio
data has been zero on both left and right channels for 1024 input samples. The first
non-zero sample de-asserts.
3.
Applying a logic low to MUTEB or setting MUT in Reg2 causes the gain registers to
ramp to zero. When a logic high is applied, the gain ramps slowly back up to the value
held in the appropriate attenuation register (AL or AR). The ramp rate = 128/fs s/0.5dB
step.
If SOFTMUTE is set or
MUTEB=0 then GAINL and
GAINR are overridden to 00
MUTEB
GAINL[0:7]
GAINR[0:7]
ANMUTE
SOFTMUTE
gain ramps between
previous and new gain
setting
Signal
Processing
IZD
ZERO
OPE
FREQ_INVALID
INIT
Automute:
Detect 1024
zero input
samples
Figure 11 Mute Modes



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com