RT9108NL datasheet(11/13 Pages) RICHTEK

11 / 13 page

RT9108NL

DS9108NL-01

June 2012

www.richtek.com

is a registered trademark of Richtek Technology Corporation.

Figure 3. Derating Curve of Maximum Power Dissipation

0.0

0.4

0.8

1.2

1.6

2.0

2.4

2.8

3.2

3.6

4.0

100

125

Ambient Temperature (°C)

Single-Layer PCB

Short Circuit Protection and Automatic Recovery

The RT9108NL has protection from over current conditions

caused by a short circuit on the output stage. The short

circuit protection fault is reported on the FAULT pin as a

low state. The amplifier outputs are switched to a Hi-Z

state when the short circuit protection latch is engaged.

The latch can be cleared by cycling the SD pin through

the low state.

If automatic recovery from the short circuit protection latch

is desired, connect the FAULT pin directly to the SD pin.

This allows the FAULT pin function to automatically drive

the SD pin low which clears the short-circuit protection

latch.

Thermal Considerations

For continuous operation, do not exceed absolute

maximum junction temperature. The maximum power

dissipation depends on the thermal resistance of the IC

package, PCB layout, rate of surrounding airflow, and

difference between junction and ambient temperature. The

maximum power dissipation can be calculated by the

following formula :

PD(MAX) = (TJ(MAX)

− TA) / θJA

where TJ(MAX) is the maximum junction temperature, TAis

the ambient temperature, and

θJAis the junction to ambient

thermal resistance.

Thermal Protection

Thermal protection on the RT9108NL prevents damage

to the device when the internal die temperature exceeds

150

°C. There is a ±15°C tolerance on this trip point from

device to device. Once the die temperature exceeds the

thermal set point, the device enters shutdown state and

the outputs are disabled. This is not a latched fault. The

thermal fault is cleared once the temperature of the die is

reduced by 15

°C. The device begins normal operation at

this point with no external system interaction.

Thermal protection faults are NOT reported on the FAULT

terminal.

For recommended operating condition specifications, the

maximum junction temperature is 125

°C. The junction to

ambient thermal resistance,

θJA, is layout dependent. For

TSSOP-28 (Exposed Pad) package, the thermal

resistance,

θJA, is 28°C/W on a standard JEDEC 51-3

single-layer thermal test board. The maximum power

dissipation at TA= 25

°C can be calculated by the following

formula :

PD(MAX) = (125

°C − 25°C) / (28°C/W) = 3.571W for

TSSOP-28 (Exposed Pad) package

The maximum power dissipation depends on the operating

ambient temperature for fixed TJ (MAX) and thermal

resistance,

θJA. The derating curve in Figure 3 allows the

designer to see the effect of rising ambient temperature

on the maximum power dissipation.

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