REV. A

AD7013

–9–

Register

Address

Register

Reset

Name

A3

A2

A1

A0

Size

State

Description

COMMAND

0

0

1

0

9 Bits

All Zeros

The COMMAND register is used to select various operating modes

of the AD7013. A detailed description of the COMMAND register

is given in Table II.

VERNIER

0

1

0

0

4 Bits

All Zeros

The VERNIER register allows additional group delay to be

introduced into the I and Q ADCs. This provides a means to vary

the ADC sampling instant.

IRx OFFSET

0

1

0

1

10 Bits

All Zeros

The contents of the IRx OFFSET register are substracted from the

I channel ADC word. When autocalibration is selected, this register

is automatically loaded by the AD7013 at the beginning of

a normal operation. When user calibration is selected, this register

can be externally loaded with a twos complement offset 10-bit

word to be subtracted from subsequent ADC samples.

QRx OFFSET

0

1

1

0

10 Bits

All Zeros

The contents of the QRx OFFSET register are substracted from

the Q channel ADC word. When auto calibration is selected, this

register is automatically loaded by the AD7013 at the beginning of

a normal operation. When user calibration is selected this register

can be externally loaded with a twos complement offset 10-bit

word to be subtracted from subsequent ADC samples.

AUX DAC1

0

1

1

1

10 Bits

All Zeros

The 10-bit auxiliary DAC current output is determined by this register.

The output current is equal to {AUX DAC1

N is the 10-bit word contained in the AUX DAC1 register and

AUX DAC1

between FSADJUST and AGND.

AUX DAC2

1

0

0

0

8 Bits

All Zeros

The 8-bit auxiliary DAC current output is determined by this register.

The output current is equal to {AUX DAC1

where N is the 8-bit word contained in the AUX DAC2 register

and AUX DAC2

connected between FS ADJUST and AGND.

AUX DAC3

1

0

0

1

8 Bits

All Zeros

The 8-bit auxiliary DAC current output is determined by this register.

The output current is equal to {AUX DAC3

where N is the 8-bit word contained in the AUX DAC3 register

and AUX DAC3

connected between FS ADJUST and AGND.

RESET

0

0

0

1

N/A

N/A

When this address in selected, all of the internal registers are initialized

to their reset state.

6-Bit LOAD

0

0

1

1

N/A

N/A

When this address is used, a special loading sequence, as shown in

Table IV, is used to write to any of the internal registers.

N/A

0

0

0

0

N/A

N/A

No Action.

N/A

1

1

1

1

N/A

N/A

No Action.

Table I. Description and Address Map for AD7013 Internal Registers

IRx OFFSET ADJUST

Rx SAMPLING VERNIER

AUX DAC1

AUX DAC2

QRx OFFSET ADJUST

AUX DAC3

DATA IN

A3 – A0

S1, S0

COMMAND REGISTER

6-BIT LOAD DATA BUFFER

DB9 – DB0

MSB

LSB

16-BIT SERIAL WORD

Figure 6. AD7013 Registers