INTEDG datasheet(94/478 Pages) MICROCHIP

94 / 478 page

PIC16(L)F1946/47

DS41414D-page 94

 2010-2012 Microchip Technology Inc.

PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2

R/W-0/0

OSFIE

C2IE

C1IE

EEIE

BCLIE

LCDIE

C3IE

CCP2IE

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

OSFIE: Oscillator Fail Interrupt Enable bit

1 = Enables the Oscillator Fail interrupt

0 = Disables the Oscillator Fail interrupt

bit 6

C2IE: Comparator C2 Interrupt Enable bit

1 = Enables the Comparator C2 interrupt

0 = Disables the Comparator C2 interrupt

bit 5

C1IE: Comparator C1 Interrupt Enable bit

1 = Enables the Comparator C1 interrupt

0 = Disables the Comparator C1 interrupt

bit 4

EEIE: EEPROM Write Completion Interrupt Enable bit

1 = Enables the EEPROM Write Completion interrupt

0 = Disables the EEPROM Write Completion interrupt

bit 3

BCLIE: MSSP1 Bus Collision Interrupt Enable bit

1 = Enables the MSSP1 Bus Collision Interrupt

0 = Disables the MSSP1 Bus Collision Interrupt

bit 2

LCDIE: LCD Module Interrupt Enable bit

1 = Enables the LCD module interrupt

0 = Disables the LCD module interrupt

bit 1

C3IE: Comparator C3 Interrupt Enable bit

1 = Enables the Comparator C3 interrupt

0 = Disables the Comparator C3 interrupt

bit 0

CCP2IE: CCP2 Interrupt Enable bit

1 = Enables the CCP2 interrupt

0 = Disables the CCP2 interrupt

Note:

Bit PEIE of the INTCON register must be

set to enable any peripheral interrupt.

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