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INTEDG Datasheet(PDF) 125 Page - Microchip Technology

No. de pieza INTEDG
Descripción Electrónicos  64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt XLP Technology
PDF  478 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

INTEDG Datasheet(HTML) 125 Page - Microchip Technology

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 2010-2012 Microchip Technology Inc.
DS41414D-page 125
PIC16(L)F1946/47
TABLE 11-3:
SUMMARY OF REGISTERS ASSOCIATED WITH DATA EEPROM
REGISTER 11-6:
EECON2: EEPROM CONTROL 2 REGISTER
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
W-0/0
EEPROM Control Register 2
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
S = Bit can only be set
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
bit 7-0
Data EEPROM Unlock Pattern bits
To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the
EECON1 register. The value written to this register is used to unlock the writes. There are specific
timing requirements on these writes. Refer to Section 11.2.2 “Writing to the Data EEPROM
Memory” for more information.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Register on
Page
EECON1
EEPGD
CFGS
LWLO
FREE
WRERR
WREN
WR
RD
124
EECON2
EEPROM Control Register 2 (not a physical register)
111*
EEADRL
EEADRL<7:0>
123
EEADRH
—(1)
EEADRH<6:0>
123
EEDATL
EEDATL<7:0>
122
EEDATH
—
—
EEDATH<5:0>
122
INTCON
GIE
PEIE
TMR0IE
INTE
IOCIE
TMR0IF
INTF
IOCIF
92
PIE2
OSFIE
C2IE
C1IE
EEIE
BCLIE
LCDIE
C3IE
CCP2IE
94
PIR2
OSFIF
C2IF
C1IF
EEIF
BCLIF
LCDIF
C3IF
CCP2IF
98
Legend:
— = unimplemented location, read as ‘0’. Shaded cells are not used by data EEPROM module.
*
Page provides register information.
Note 1:
Unimplemented, read as ‘1’.



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