AD5560JBCZ datasheet(61/68 Pages) AD

61 / 68 page

Data Sheet

AD5560

Rev. D | Page 61 of 68

POWER SUPPLY DECOUPLING

In any circuit where accuracy is important, careful consid-

eration of the power supply and ground return layout helps

to ensure the rated performance. The printed circuit board

on which the AD5560 is mounted should be designed so that

the analog and digital sections are separated and confined to

certain areas of the board. If the AD5560 is in a system where

multiple devices require an AGND-to-DGND connection, the

connection should be made at one point only. The star ground

point should be established as close as possible to the device.

The DGND connection in the AD5560 should be treated as

AGND and returned to the AGND plane. For more detail on

decoupling for mixed signal applications, refer to Analog

Devices Tutorial MT 031.

For supplies with multiple pins (AVSS, AVDD, DVCC), it is

recommended to tie these pins together and to decouple

each supply once.

The AD5560 should have ample supply decoupling of 10 µF

in parallel with 0.1 µF on each supply located as close to the

part as possible, ideally right up against the device. The 10 µF

capacitors are the tantalum bead type. The 0.1 µF capacitor

should have low effective series resistance (ESR) and effective

series inductance (ESL), such as the common ceramic capaci-

tors that provide a low impedance path to ground at high

frequencies to handle transient currents due to internal logic

switching.

Digital lines running under the device should be avoided because

these couple noise onto the device. The analog ground plane

should be allowed to run under the AD5560 to avoid noise

coupling. The power supply lines of the AD5560 should use as

large a trace as possible to provide low impedance paths and

reduce the effects of glitches on the power supply line. Fast

switching digital signals should be shielded with digital ground

to avoid radiating noise to other parts of the board and should

never be run near the reference inputs. It is essential to

minimize noise on all VREF lines. Avoid crossover of digital

and analog signals. Traces on opposite sides of the board

should run at right angles to each other. This reduces the effects

of feedthrough throughout the board. As is the case for all thin

packages, care must be taken to avoid flexing the package and

to avoid a point load on the surface of this package during the

assembly process.

Also note that the exposed paddle of the AD5560 is internally

connected to the negative supply AVSS.

AD5560JBCZ Datasheet(PDF) 61 Page - Analog Devices

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