AM79C984 datasheet(21/44 Pages) AMD

21 / 44 page

P R E L I M I N A R Y

Am79C984A

Figure 5. Internal Arbitration—eIMR Devices in Cascade

Control Functions

The eIMR device receives control commands in the

form of byte-length data on the serial input pin, SI. If the

eIMR device is expected to provide data in response to

the command, it will send byte-length data to the serial-

output pin, SO. Both the input and output data streams

are clocked with the rising edge of the SCLK signal.

The byte-length data is in RS232 serial-data format;

that is, one start bit followed by eight data bits. The ex-

ternally generated clock at the SCLK pin may be either

a free-running clock synchronized to the input bit pat-

terns, or a series of individual transitions meeting the

setup-and-hold times with respect to the input bit pat-

tern. If the latter method is used, 20 SCLK clock transi-

tions are required for control commands that produce

SO data, and 14 SCLK clock transitions are required

for control commands that do not produce SO data.

VDD

20650A-10

Ω

SELI_0

SELI_1

SELO

SELI_0

SELI_1

SELO

SELI_0

SELI_1

SELO

SELI_0

SELI_1

SELO

SELI_0

SELI_1

SELO

SELI_0

SELI_1

SELO

SELI_0

SELI_1

SELO

20650B-10

AM79C984 Datasheet(PDF) 21 Page - Advanced Micro Devices

AM79C984 Datasheet(HTML) 21 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Datasheet Descarga

Enlace URL