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AS8650B Datasheet(PDF) 14 Page - ams AG

No. de pieza AS8650B
Descripción Electrónicos  High-efficient Power Management Device with High-speed CAN Interface
PDF  47 Pages
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Fabricante Electrónico  AMSCO [ams AG]
Página de inicio  http://www.ams.com
Logo AMSCO - ams AG

AS8650B Datasheet(HTML) 14 Page - ams AG

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www.ams.com/AS8650
Revision 1.1
13 - 46
AS8650B
Datasheet - Electrical Character i s t ics
6.5 Undervoltage Detection
6.6 Digital Timing Specification
SPI Protocol.
Table 12. Undervoltage Detection
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VSUP_POR
VSUP Power on Reset threshold on
Rising edge of VSUP
5.09
5.5
5.91
V
VSUP_RESET
VSUP Power on Reset threshold off
(Master Reset for Device)
4.49
4.85
5.21
V
VSUP_POKTH
VSUP undervoltage threshold off
VSUP rising edge
(Brown out reset threshold)
4.95
5.35
5.75
V
VSUP_UVTH
VSUP undervoltage threshold on
(CAN bus in recessive state)
VSUP falling edge
(Brown out reset threshold)
4.625
5.0
5.375
V
V5V_POKTH
V5V undervoltage threshold off
Rising edge of V5V
4.16
4.5
4.84
V
V5V_UVTH
V5V undervoltage threshold on
Falling edge of V5V
3.8
4.1
4.4
V
VLDO_POKTH
LDO undervoltage threshold off
(VLDO1, VLDO2 and VLDO3)
Percent value is with respect to LDO
output. Rising edge of LDO
87
89
91
%
VLDO_UVTH
LDO undervoltage threshold on
(VLDO1, VLDO2 and VLDO3)
Percent value is with respect to LDO
output. Falling edge of LDO
78
80
82
%
trr
Spike filter on VLDO1
To remove disturbance
2
4
8
µs
tRes
Reset delay time
48
12
ms
Table 13. SPI Timing Parameters
Symbol
Parameter
Conditions
Min
Typ
Max
Units
General
BRSPI
Bit rate
1
Mbps
TSCLKH
Clock high time
500
ns
TSCLKL
Clock low time
500
ns
Write Operation Parameters
tDIS
Data in setup time
20
ns
tDIH
Data in hold time
10
ns
TCSH
CS hold time
40
ns
Read Operation Parameters
tDOD
Data out delay
80
ns
tDOHZ
Data out to high impedance delay
Time for the SPI to release the SDO bus
80
ns
Timing Parameters for SCLK Polarity Identification
tCPS
Clock setup time
(CLK polarity)
Setup time of SCLK with respect to CS
falling edge
20
ns
tCPHD
Clock hold time
(CLK polarity)
Hold time of SCLK with respect to CS
falling edge
20
ns



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