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STAC9704 Datasheet(PDF) 35 Page - Hynix Semiconductor

No. de pieza STAC9704
Descripción Electrónicos  Multimedia Audio Codec for AC97
PDF  49 Pages
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Fabricante Electrónico  HYNIX [Hynix Semiconductor]
Página de inicio  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

STAC9704 Datasheet(HTML) 35 Page - Hynix Semiconductor

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SigmaTel, Inc.
STAC9704/7
35
10/02/98
Table 20: Warm Reset
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
SYNC active high pulse width
Tsync_high
-
1.3
-
us
SYNC inactive to BIT_CLK startup delay
Tsync_2clk
162.8
-
-
ns
7.3 Clocks
Figure 16: Clocks
BIT_CLK
SYNC
Tclk_high
Tclk_low
Tclk_period
Tsync_low
Tsync_high
Tsync_period
Table 21: Clocks
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
BIT_CLK frequency
-
12.288
-
MHz
BIT_CLK period
Tclk_period
-
81.4
-
ns
BIT_CLK output jitter
-
-
750
ps
BLT_CLK high pulsewidth (note 1)
Tclk_high
32.56
40.7
48.84
ns
BIT_CLK low pulse width (note 1)
Tclk_low
32.56
40.7
48.84
ns
SYNC frequency
-
48.0
-
kHz
SYNC period
Tsync_period
-
20.8
-
us
SYNC high pulse width
Tsync_high
-
1.3
-
us
SYNC low_pulse width
Tsync_low
-
19.5
-
us
Notes: 1) Worst case duty cycle restricted to 40/60.



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