ICS1889 datasheet(15/35 Pages) ICST

No. de pieza	ICS1889

Descripción Electrónicos	100Base-FX Integrated PHYceiverTM

PDF	35 Pages

Scroll/Zoom	100%

Fabricante Electrónico	ICST [Integrated Circuit Systems]

Página de inicio	http://www.icst.com

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15 / 35 page

ICS1889

Enable Far End Fault (bit 4)

If this bit is set to a logic one, the far end fault logic becomes

active resulting in faults being signaled and recognized via the

in-band signaling scheme. If this bit is set to a logic zero,

the far end fault logic is disabled.

Transmit Far End Fault (bit 3)

Management may indicate a fault has occurred to its link

partner by setting this bit to a logic one. Indicating a fault

brings the link down and disables the reception of data until

this bit is cleared and the link is reestablished.

Invalid Error Code Test (bit 2)

If this bit is set to a logic one, the 4B5B encoder operates as a

5B5B encoder obtaining the fifth bit of the code group from

the value of TXER.

Reserved (bit 1)

This bit is reserved for ICS use. It must always be written with

a logic zero. A read always returns a logic zero.

Reserved (bit 0)

This bit is reserved for ICS use. It must always be written with

a logic zero. A read always returns a logic zero.

ICS1889 Datasheet(PDF) 15 Page - Integrated Circuit Systems