Integrated

Circuit

Systems, Inc.

General Description

Features

ICS9250-13

Block Diagram

Pentium is a trademark of Intel Corporation

I

9250-13 Rev A 3/25/99

Pin Configuration

•

3.3Voutputs: SDRAM, PCI, REF, 48/24MHz

•

2.5V or 3.3V outputs: CPU

•

20 ohm CPU clock output impedance

•

20 ohm PCI clock output impedance

•

Skew from CPU (earlier) to PCI clock - 1 to 4 ns,

center 2.6 ns.

•

•

±250 ps CPU, PCI clock skew

•

400ps (cycle to cycle) CPU jitter

•

Smooth frequency switch, with selections from

50 to 83.3 MHz CPU.

•

2ms power up clock stable time

•

Clock duty cycle 45-55%.

•

56 pin 300 mil SSOP package

•

3.3V operation, 5V tolerant input.

56-Pin SSOP

Power Groups

VDDREF=REF(0:1),X1,X2

VDDPCI=PCICLK_F,PCICLK(0:5)

VDDSDR = SDRAM (0:11), supply for PLL core,

VDD48=24MHz,48MHz

VDDLIOAPIC=IOAPIC

VDDL2CPU= CPUCLK(0:3)

* Internal Pull-up Resistor of

120K to VDD on indicated inputs

The ICS9250-13 generates all clocks required for high speed

RISC or CISC microprocessor systems such as Intel PentiumPro

or Cyrix. Eight different reference frequency multiplying factors

are externally selectable with smooth frequency transitions.

Spread spectrum typically reduces system EMI by 8dB to

10dB. This simplifies EMI qualification without resorting to

board design iterations or costly shielding. The ICS9250-13

employs a proprietary closed loop design, which tightly

controls the percentage of spreading over process and

temperature variations.

Recomended Application:

•

440LX/EX type chipset Motherboard single chip

clock solution.

ICS reserves the right to make changes in the device data identified in

this publication without further notice. ICS advises its customers to

obtain the latest version of all device data to verify that any

information being relied upon by the customer is current and accurate.