RM0312 datasheet(123/275 Pages) STMICROELECTRONICS

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RM0312

16-bit general purpose timer (TIM2/TIM3)

170

Using one timer as prescaler for another timer

Figure 42. Master/slave timer example

For example, you can configure Timer A to act as a prescaler for Timer B. Refer to

Figure 43. To do this:

Configure Timer A in master mode so that it outputs a periodic trigger signal on each

update event UEV. To configure that a rising edge is output on TRGO1 each time an

update event is generated, write MMS=010 in the TIMx_CR2 register,.

Connect the TRGO1 output of Timer A to Timer B, Timer B must be configured in slave

mode using ITR1 as internal trigger. Select this through the TS bits in the TIMx_SMCR

Put the clock/trigger controller in external clock mode 1, by writing SMS=111 in the

TIMx_SMCR register. This causes Timer B to be clocked by the rising edge of the

periodic Timer A trigger signal (which corresponds to the Timer A counter overflow).

Finally enable both timers by setting their respective CEN bits (TIMx_CR1 register).

Note:

If OCi is selected on Timer A as trigger output (MMS=1xx), its rising edge is used to clock

the counter of Timer B.

Using one timer to enable another timer

In this example, we control the enable of Timer B with the output compare 1 of Timer A.

Refer to Figure 43 for connections. Timer B counts on the divided internal clock only when

OC1REF of Timer A is high. Both counter clock frequencies are divided by 4 by the

prescaler compared to f

MASTER (f

CK_CNT = fMASTER/4).

Configure Timer A master mode to send its Output Compare 1 Reference (OC1REF)

signal as trigger output (MMS=100 in the TIMx_CR2 register).

Configure the Timer A OC1REF waveform (TIMx_CCMR1 register).

Configure Timer B to get the input trigger from Timer A (TS=001 in the TIMx_SMCR

Configure Timer B in trigger gated mode (SMS=101 in TIMx_SMCR register).

Enable Timer B by writing ‘1’ in the CEN bit (TIMx_CR1 register).

Start Timer A by writing ‘1’ in the CEN bit (TIMx_CR1 register).

Note:

The counter 2 clock is not synchronized with counter 1, this mode only affects the Timer B

counter enable signal.

TRGO1

UEV

ITR1

PRESCALER COUNTER

SMS

MMS

TIMER A

TIMER B

MASTER

MODE

CONTROL

SLAVE

MODE

CONTROL

CK_PSC

PRESCALER COUNTER

Clock

INPUT

SELECTION

TRIGGER

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