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RM0312 Datasheet(PDF) 135 Page - STMicroelectronics |
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RM0312 Datasheet(HTML) 135 Page - STMicroelectronics |
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135 / 275 page ![]() DocID022352 Rev 3 135/275 RM0312 16-bit general purpose timer (TIM2/TIM3) 170 OCi polarity is software programmable using the CCiP bit in the TIMx_CCERi register. It can be programmed as active high or active low. OCi output is enabled by a combination of CCiE, MOE, OISi, OSSR and OSSI bits (TIMx_CCERi and TIMx_BKR registers). Refer to the TIMx_CCERi register description for more details. In PWM mode (1 or 2), TIMx_CNT and TIMx_CCRi are always compared to determine whether TIMx_CCRi ≤TIMx_CNT or TIMx_CNT≤TIMx_CCRi (depending on the direction of the counter). The timer is able to generate PWM in edge-aligned mode or center-aligned mode depending on the CMS bits in the TIMx_CR1 register. PWM edge-aligned mode Up-counting configuration Up-counting is active when the DIR bit in the TIMx_CR1 register is low. In the following example, we consider the PWM mode 1. The reference PWM signal OCiREF is high as long as TIMx_CNT <TIMx_CCRi else it becomes low. If the compare value in TIMx_CCRi is greater than the auto-reload value (in TIMx_ARR) then OCiREF will be held at ‘1’. If the compare value is 0 then OCiREF will be held at ‘0’. Figure 57 shows some edge-aligned PWM waveforms in an example where TIMx_ARR=8. Figure 57. Edge-aligned counting mode PWM mode 1 waveforms (ARR=8) Down-counting configuration Down-counting is active when DIR bit in TIMx_CR1 register is high. Refer to Down-counting mode on page 111 In PWM mode 1, the reference signal OCiREF is low as long as TIMx_CNT> TIMx_CCRi else it becomes high. If the compare value in TIMx_CCRi is greater than the auto-reload value in TIMx_ARR, then OCiREF will be held at ‘1’. 0% PWM is not possible in this mode. PWM center-aligned mode Center-aligned mode is active when the CMS bits in TIMx_CR1 register are different from ‘00’ (all the remaining configurations having the same effect on the OCiREF/OCi signals). COUNTER REGISTER ‘1’ 0 12 34 5 6 7 8 0 1 ‘0’ OCiREF CCiIF OCiREF CCiIF OCiREF CCiIF OCiREF CCiIF CCRx = 4 CCRx = 8 CCRx > 8 CCRx = 0 |
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