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ICS2510C Datasheet(PDF) 4 Page - Integrated Device Technology |
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ICS2510C Datasheet(HTML) 4 Page - Integrated Device Technology |
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4 / 7 page ![]() 4 ICS2510C 0010G—09/22/09 Symbol Parameter Test Conditions Min. Max. Unit Fclk Input clock frequency 25 175 MHz Input clock frequency duty cycle 40 60 % Stabilization time After power up 1 ms Timing requirements over recommended ranges of supply voltage and operating free-air temperature Note: Time required for the PLL circuit to obtain phase lock of its feedback signal to its In order for phase lock to be obtained, a fixed-frequency, fixed-phase reference signal Until phase lock is obtained, the specifications for parameters given in the switching Electrical Characteristics - Input & Supply TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-10% (unless otherwise stated) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Input High Voltage VIH 2VDD + 0.3 V Input Low Voltage VIL VSS - 0.3 0.8 V Input High Current IIH VIN = VDD 0.1 100 uA Input Low Current IIL VIN = 0 V; 19 50 uA Operating current IDD1 CL = 0 pF; FIN @ 66M 140 170 mA Input Capacitance CIN 1 Logic Inputs 4 pF Output Capacitance CO 1 Logic Outputs 8 pF 1Guaranteed by design, not 100% tested in production. |
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