17-24GHz Low Noise Amplifier

CHA2090

Ref. : DSCHA20909347-13 Dec 99

7/8

Specifications subject to change without notice

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Chip Biasing options

This chip is self-biased, and flexibility is provided by the access to number of pads. The

internal DC electrical schematic is given in order to use these pads in a safe way.

The two requirements are:

N°1: Not exceed Vds = 3.5Volt

(internal Drain to S ource voltage)

N°2: Not biased in such a way that Vgs becomes posi tive.

(internal Gate to Source voltage)

We propose two standard biasing:

Low Noise and low consumption:

Vd = 4.5V and B, D, E grounded

All the other pads non connected (NC)

Idd = 55mA & Pout-1dB = 10dBm Typical

(Equivalent to A, B, C, D, E, F: non connected and Vd=4.5V; G1=G2=G3=+1V

Low Noise and higher output power

Vd = 4.5V and B, C, F grounded

All the other pads non connected (NC)

Idd = 75mA & Pout-1dB = 12dBm Typical