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RFM219SW Datasheet(PDF) 17 Page - List of Unclassifed Manufacturers |
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RFM219SW Datasheet(HTML) 17 Page - List of Unclassifed Manufacturers |
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17 / 35 page ![]() RFM219SW www.hoperf.com Rev 1.0 | Page 17/35 E-mail:sales@hoperf.com modulation index is given by: Modulation Index = The value of crystal tolerance dominates the frequency error: Deviation x 2 Symbol Rate Frequency Error >= Xtal Tolerance x Frequency By obeying the following rules, the RFPDK automatically computed the minimum value of the deviation that can be configured. Deviation >= Symbol Rate x 2 Deviation >= Frequency Error 0.7 This means the Modulation Index cannot be less than 1. Also, the deviation must be larger than the frequency error in order to guarantee the reception. The RFPDK also computes the maximum value of the deviation that can be configured. The following rule is obeyed: Deviation <= 220 kHz – Frequency Error Therefore, once the Symbol Rate and Xtal Tolerance are configured on the RFPDK, the configurable range of the Deviation is automatically obtained. On the other hand, the FSK demodulation can be automatically turned on and off by detecting the RSSI relative thresholds to save the power consumption of the device. Automatic Frequency Control (AFC) can be used by the user to minimize/remove the frequency error between the Tx and the Rx. More details of the (G)FSK demodulation can be found in the document “AN138 RFM219SW Configuration Guideline”. 5.6 SPI Interface The communication between the MCU and the chip is done via the 4-wire SPI interface. The active-low CSB indicates that the MCU is trying to access to the registers. The active-low FCSB indicates that the MCU is trying to read the FIFO. The CSB and FCSB cannot be both set low at the same time. The SCL is the serial clock. For both of the MCU and the chip, data is always sent at the falling edge of SCL and captured at the rising edge of SCL. The SDA is a bi-directional data pin. Address and data is always sent starting from the MSB. 5.6.1 Register Read & Write Operation While accessing to the registers, an r/w bit is sent followed by a 7-bit register address. The MCU must pull the CSB to low at least half SCL cycle before sending the r/w bit. After issuing the last falling edge of SCL, the MCU must wait for at least half SCL cycle before pulling the CSB back to high. |
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