4

www.pericom.com

PI6C49019

Rev. B

06/25/13

PI6C49019

Low Power Networking Clock Generator

Selection Table 1 – 33M/67M Spread Spectrum

SS1

SS0

SSC

0

0

No spread

0

1

Down -0.5%

1

0

Down -0.75%

1

1

Down -1.00%

Selection Table 2 – 125 MHz / 25 MHz Frequency Selection Table

SEL

Output

0

REF

1

125 MHz

Notes: VDD and GND Pins Layout Guide

1. Small value decoupling caps. (0.1uF, 1uF, and 2.2uF) should be placed close each VDD pin or its via

2. Connect all GND pins to package thermal pad which must be connected to the GND plane for better thermal distribution and signal conducting with reason-

able via count (>8)

13-0103