ADM1260 datasheet(10/71 Pages) AD

10 / 71 page

ADM1260

Data Sheet

Rev. 0 | Page 10 of 71

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADM1260

TOP VIEW

(Not to Scale)

VX1

VX2

VX3

VX4

VX5

VP1

VP2

VP3

VP4

PDO1

PDO2

PDO3

PDO4

PDO5

PDO6

PDO7

PDO8

PDO9

PDO10

NOTES

1. EXPOSED PAD. THIS PAD IS A NO CONNECT (NC). IF POSSIBLE,

SOLDER THIS PAD TO THE BOARD FOR IMPROVED MECHANICAL

STABILITY. THE EXPOSED PAD MAY BE CONNECTED TO GROUND,

THOUGH THIS CONNECTION IS NOT REQUIRED.

Figure 3. Pin Configuration

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1 to 5

VX1 to VX5 (VXx)

High Impedance Inputs to Supply the Fault Detectors. Fault thresholds can be set from 0.573 V to1.375 V.

Alternatively, use these pins as general-purpose logic inputs.

6 to 9

VP1 to VP4 (VPx)

Low Voltage Inputs to Supply the Fault Detectors. Three input ranges can be set by altering the input

attenuation on a potential divider connected to these pins, the output of which connects to a supply fault

detector. These pins allow thresholds from 2.5 V to 6.0 V, from 1.25 V to 3.00 V, and from 0.573 V to 1.375 V.

High Voltage Input to Supply the Fault Detectors. Two input ranges can be set by altering the input

attenuation on a potential divider connected to this pin, the output of which connects to a supply fault

detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.

AGND1

Ground Return for Input Attenuators.

REFGND1

Ground Return for On-Chip Reference Circuits.

REFIN

Reference Input for the ADC. This pin is nominally 2.048 V and must be driven by a reference voltage. Use the

on-board reference by connecting the REFOUT pin to the REFIN pin.

REFOUT

Reference Output, 2.048 V. This pin is typically connected to REFIN. Note that the recommended 10 μF capacitor

must be connected between this pin and REFGND.

15 to 20

DAC1 to DAC6

Voltage Output DACs. These pins default to high impedance at power-up.

21 to 30

PDO10 to PDO1

Programmable Driver Outputs.

PDOGND1

Ground Return for Driver Outputs.

VCCP

Central Charge Pump Voltage of 5.25 V (Positive/Negative). A reservoir capacitor must be connected between

this pin and GND. A 10 μF capacitor is recommended for this purpose.

Logic Input 0. This pin sets the seventh bit of the SMBus interface address.

Logic Input 1. This pin sets the sixth bit of the SMBus interface address.

SCL

SMBus Clock. This pin is a bidirectional, open-drain pin that requires an external pull-up resistor.

SDA

SMBus Data. This pin is a bidirectional, open-drain pin that requires an external pull-up resistor.

CCL

ICB Clock. This pin is a bidirectional, open-drain pin that requires an external pull-up resistor.

CDA

ICB Data. This pin is a bidirectional, open-drain pin that requires an external pull-up resistor.

VDDCAP

Device Supply Voltage. This pin is linearly regulated from the highest of the VPx and VH pins to a typical of

4.75 V. Note that the minimum 10 μF capacitor must be connected between this pin and GND.

GND1

Supply Ground.

EPAD

Exposed Pad. This pad is a no connect (NC). If possible, solder this pad to the board for improved mechanical

stability. The exposed pad may be connected to ground, though this connection is not required.

1 In a typical application, all ground pins are connected together.

ADM1260 Datasheet(PDF) 10 Page - Analog Devices

ADM1260 Datasheet(HTML) 10 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71

Datasheet Descarga

Enlace URL