A25QFO080QL datasheet(39/58 Pages) AMICC

39 / 58 page

A25LQ080 Series

(April, 2016, Version 1.0)

AMIC Technology Corp.

Program / Erase Suspend

The Suspend instruction allows the system to interrupt a

Sector or Block Erase operation or a Page Program

operation and then read from or program data to, any other

sectors or blocks. The Suspend instruction sequence is

shown in figure 29.

The Write Status Register instruction (01h) and Erase

instructions (20h, 52h, D8h, C7h, 60h) are not allowed during

Erase Suspend. Erase Suspend is valid only during the

Sector or Block erase operation. If written during the Chip

Erase operation, the Erase Suspend instruction is ignored.

The Write Status Register instruction (01h) and Page

Program instructions (02h) are not allowed during Program

Suspend. Program Suspend is valid only during the Page

Program operation.

The Suspend instruction will be accepted by the device only

if the SUS bit in the Status Register equals to 0 and the WIP

bit equals to 1 while a Sector or Block Erase or a Page

Program operation is on-going. If the SUS bit equals to 1 or

the BUSY bit equals to 0, the Suspend instruction will be

ignored by the device. A maximum of time of “tSUS” (See AC

Characteristics) is required to suspend the erase or program

operation. The WIP bit in the Status Register will be cleared

from 1 to 0 within “tSUS” and the SUS bit in the Status

Program/Erase

Suspend.

For

previously

resumed

Program/Erase operation, it is also required that the Suspend

instruction is not issued earlier than a minimum of time of

“tSUS” following the preceding Resume instruction.

Unexpected power off during the Program/Erase suspend

state will reset the device and release the suspend state.

SUS bit in the Status Register will also reset to 0. The data

within the page, sector or block that was being suspended

may become corrupted. It is recommended for the user to

implement system design techniques against the accidental

power interruption and preserve data integrity during

Program/Erase suspend state.

Figure 28. Suspend Instruction Sequence

DIO

1 2 3 45 6 7

Instruction (75h or B0h)

Accept Read or Program

Instruction

High Impedance

tSUS

Table 8. Operations Allowed and Not Allowed During a Program or Erase Suspend

Command

Operation During Program Suspend

Operation During Erase Suspend

Read Commands

Read Data

Allowed

Program and Erase Commands

Not Allowed

Allowed

SE/ BE/ CE

Not Allowed

Status Register Commands

RDSR-1/ RDSR-2

Allowed

WRSR

Not Allowed

Other Commands

SUSPEND

Not Allowed

RESUME

Allowed

HPM

Allowed

WREN

Allowed

WRDI

Allowed

RDID/ REMS/ RES/ SFDP

Allowed

Not Allowed

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