8

Integrated

Circuit

Systems, Inc.

ICS9DB108

0723D—01/08/04

SMBus Table: Frequency Select Register, READ/WRITE ADDRESS (DC/DD)

Pin #

Name

Control Function Type

0

1

PWD

Bit 7

RW

driven

Hi-Z

0

Bit 6

RW

driven

Hi-Z

0

Bit 5

RW

X

Bit 4

RW

X

Bit 3

RW

X

Bit 2

RW

High BW

Low BW

1

Bit 1

RW

fan-out

ZDB

1

Bit 0

RW

x/2

1x

1

SMBus Table: Output Control Register

Pin #

Name

Control Function Type

0

1

PWD

Bit 7

DIF_7

Output Control

RW

Disable

Enable

1

Bit 6

DIF_6

Output Control

RW

Disable

Enable

1

Bit 5

DIF_5

Output Control

RW

Disable

Enable

1

Bit 4

DIF_4

Output Control

RW

Disable

Enable

1

Bit 3

DIF_3

Output Control

RW

Disable

Enable

1

Bit 2

DIF_2

Output Control

RW

Disable

Enable

1

Bit 1

DIF_1

Output Control

RW

Disable

Enable

1

Bit 0

DIF_0

Output Control

RW

Disable

Enable

1

Byte 0

-

PD# drive mode

-

SRC_Stop# drive mode

-

Reserved

Reserved

-

Reserved

Reserved

-

Reserved

Reserved

-

PLL_BW# adjust

-

BYPASS#/PLL

-

SRC_DIV#

Byte 1

42,41

38,37

34,33

30,29

20,21

16,17

12,13

8,9