ADE7754AR datasheet(38/44 Pages) AD

38 / 44 page

REV. PrG 01/03

PRELIMINARY TECHNICAL DATA

ADE7754

– 38 –

Operational Mode Register (0Ah)

The general configuration of the ADE7754 is defined by writing to the OPMODE register. Table IX below summarizes the

functionality of each bit in the OPMODE register .

Table IX OPMODE Register

Bit

Default

Location

Mnemonic

Value

Description

DISHPF

The HPF (High Pass Filter) in all current channel inputs are disabled when this bit is set.

DISLPF

The LPFs (Low Pass Filter) in all current channel inputs are disabled when this bit is set.

DISCF

The Frequency output CF is disabled when this bit is set.

3-5

DISMOD

By setting these bits, ADE7754’s A/D converters can be turned off. In normal operation,

these bits should be left at logic zero.

DISMOD2 DISMOD1 DISMOD0

Normal operation

Normal operation, by setting this bit to logic 1 the

analog inputs to current channel are connected to the ADC

for voltage channel and the analog inputs to voltage

channel are connected to the ADC for current channel

Current channel A/D converters OFF

Current channel A/D converters OFF + chan

nels swapped

Voltage Channel A/D converters OFF

Voltage Channel A/D converters OFF + chan

nels swapped

ADE7754 in Sleep Mode

ADE7754 powered down

SWRST

Software chip reset. A data transfer to the ADE7754 should not take place for at least 18µs

after a software reset.

RESERVED -

This is intended for factory testing only and should be left at zero.

ADE7754AR Datasheet(PDF) 38 Page - Analog Devices

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