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ST10F296 Datasheet(PDF) 182 Page - STMicroelectronics |
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ST10F296 Datasheet(HTML) 182 Page - STMicroelectronics |
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182 / 346 page  Obsolete Product(s) - Obsolete Product(s) Analog-to-digital converter (ADC) ST10F296E 182/346 Timer output The trigger output, XADCINJ, is generated when the current value of the timer (XTCVR) matches the end value stored in the XTEVR register and when the output enable bit is set (XTCR.TOE = 1). If the output enable bit is reset, no event is generated regardless of the timer status (the XADINJ pin is kept at high impedance state). The XADCINJ output trigger event is a positive pulse of 12 CPU clock cycles width (187 ns @64 MHz). To generate an ADC channel injection it has to be externally connected to the input P7.7/CC31 (CAPCOM2 capture/compare). The ADC exclusively converts Port 5 or XPort 10 inputs. If one ‘y’ channel has to be used continuously in injection mode, it must be externally connected by hardware to Port5.y and XPort10.y inputs. Obsolete Product(s) - Obsolete Product(s) |
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