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STM32L062T8 Datasheet(PDF) 35 Page - STMicroelectronics |
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STM32L062T8 Datasheet(HTML) 35 Page - STMicroelectronics |
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35 / 118 page ![]() DocID025937 Rev 8 35/118 STM32L062x8 Functional overview 36 Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to 9600 baud. Therefore, even in Stop mode, the LPUART can wait for an incoming frame while having an extremely low energy consumption. Higher speed clock can be used to reach higher baudrates. LPUART interface can be served by the DMA controller. 3.19.4 Serial peripheral interface (SPI)/Inter-integrated sound (I2S) One SPI is able to communicate at up to 16 Mbits/s in slave and master modes in full-duplex and half-duplex communication modes. The 3-bit prescaler gives 8 master mode frequencies and the frame is configurable to 8 bits or 16 bits. The hardware CRC generation/verification supports basic SD Card/MMC modes. The USARTs with synchronous capability can also be used as SPI master. The SPI can be served by the DMA controller. Refer to Table 13 for a summary pf SPI features. 3.19.5 Universal serial bus (USB) The STM32L062x8 embed a full-speed USB device peripheral compliant with the USB specification version 2.0. The internal USB PHY supports USB FS signaling, embedded DP pull-up and also battery charging detection according to Battery Charging Specification Revision 1.2. The USB interface implements a full-speed (12 Mbit/s) function interface with added support for USB 2.0 Link Power Management. It has software-configurable endpoint setting with packet memory up to 1 KB and suspend/resume support. It requires a precise 48 MHz clock which can be generated by the internal 48 MHz oscillator in automatic trimming mode. The synchronization for this oscillator can be taken from the USB data stream itself (SOF signalization) which allows crystal-less operation. 3.20 Clock recovery system (CRS) The STM32L062x8 embed a special block which allows automatic trimming of the internal 48 MHz oscillator to guarantee its optimal accuracy over the whole device operational range. This automatic trimming is based on the external synchronization signal, which could be either derived from USB SOF signalization, from LSE oscillator, from an external signal on CRS_SYNC pin or generated by user software. For faster lock-in during startup it is also possible to combine automatic trimming with manual trimming action. Table 13. SPI/I2S implementation SPI features(1) 1. X = supported. SPI1 Hardware CRC calculation X I2S mode - TI mode X |
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