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STM32L432KB Datasheet(PDF) 134 Page - STMicroelectronics

No. de pieza STM32L432KB
Descripción Electrónicos  Batch acquisition mode
PDF  149 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L432KB Datasheet(HTML) 134 Page - STMicroelectronics

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Electrical characteristics
STM32L432KB STM3L432KC
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DocID028798 Rev 2
Figure 23. SPI timing diagram - slave mode and CPHA = 0
tv(SO)
Data output valid time
Slave mode 2.7 < VDD < 3.6 V
Voltage Range 1
-
12.5
13.5
ns
Slave mode 1.71 < VDD < 3.6 V
Voltage Range 1
-12.5
24
Slave mode 1.71 < VDD < 3.6 V
Voltage Range 2
-12.5
33
tv(MO)
Master mode
-
4.5
6
th(SO)
Data output hold time
Slave mode
7
-
-
ns
th(MO)
Master mode
0
-
-
1. Guaranteed by characterization results.
2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or
high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master
having tsu(MI) = 0 while Duty(SCK) = 50 %.
Table 76. SPI characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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