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STM32L432KB Datasheet(PDF) 14 Page - STMicroelectronics |
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STM32L432KB Datasheet(HTML) 14 Page - STMicroelectronics |
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14 / 149 page ![]() Functional overview STM32L432KB STM3L432KC 14/149 DocID028798 Rev 2 3.4 Embedded Flash memory STM32L432xx devices feature up to 256 Kbyte of embedded Flash memory available for storing programs and data in single bank architecture. The Flash memory contains 128 pages of 2 Kbyte. Flexible protections can be configured thanks to option bytes: • Readout protection (RDP) to protect the whole memory. Three levels are available: – Level 0: no readout protection – Level 1: memory readout protection: the Flash memory cannot be read from or written to if either debug features are connected, boot in RAM or bootloader is selected – Level 2: chip readout protection: debug features (Cortex-M4 JTAG and serial wire), boot in RAM and bootloader selection are disabled (JTAG fuse). This selection is irreversible. • Write protection (WRP): the protected area is protected against erasing and programming. Two areas can be selected, with 2-Kbyte granularity. • Proprietary code readout protection (PCROP): a part of the flash memory can be protected against read and write from third parties. The protected area is execute-only: it can only be reached by the STM32 CPU, as an instruction code, while all other accesses (DMA, debug and CPU data read, write and erase) are strictly prohibited. The PCROP area granularity is 64-bit wide. An additional option bit (PCROP_RDP) allows to select if the PCROP area is erased or not when the RDP protection is changed from Level 1 to Level 0. Table 2. Access status versus readout protection level and execution modes Area Protection level User execution Debug, boot from RAM or boot from system memory (loader) Read Write Erase Read Write Erase Main memory 1 Yes Yes Yes No No No 2 Yes Yes Yes N/A N/A N/A System memory 1 Yes No No Yes No No 2 Yes No No N/A N/A N/A Option bytes 1 Yes Yes Yes Yes Yes Yes 2 Yes No No N/A N/A N/A Backup registers 1Yes Yes N/A(1) 1. Erased when RDP change from Level 1 to Level 0. No No N/A(1) 2 Yes Yes N/A N/A N/A N/A SRAM2 1 Yes Yes Yes(1) No No No(1) 2 Yes Yes Yes N/A N/A N/A |
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