EP9307 datasheet(8/48 Pages) CIRRUS

8 / 48 page

DS667PP3

EP9307

ARM9 SOC with Ethernet, USB, Display and Touchscreen

Graphics Accelerator

The EP9307 contains a hardware graphics acceleration

engine that improves graphic performance by handling

block copy, block fill and hardware line draw operations.

The Graphics Accelerator is used in the system to off-

load graphics operations from the processor.

Pixel depths supported by the Graphics Accelerator are

4, 8, 16 or 24 bits per pixel (bpp). The 24 bits per pixel

mode can be operated as packed (4 pixels every 3

words) or unpacked (1 pixel per word with the high byte

unused.)

The block copy operations of the Graphics Accelerator

are similar to a DMA (Direct Memory Access) transfer

that

understands

pixel

organization,

block

width,

transparency, and transformation from 1bpp to higher 4,

8, 16 or 24 bpp.

The line draw operations also allow for solid lines or

dashed lines. The colors for line drawing can be either

foreground color and background color or foreground

color with the background being transparent.

Touch Screen Interface with 12-bit Analog-

to-Digital Converter (ADC)

The touch screen interface performs all sampling,

averaging, ADC range checking, and control for a wide

variety of analog resistive touch screens. This controller

only interrupts the processor when a meaningful change

occurs. The touch screen hardware may be disabled and

the switch matrix and ADC controlled directly if desired.

Features include:

•

Support for 4, 5, 7, or 8-wire analog resistive touch

screens.

•

Flexibility - unused lines may be used for temperature

sensing or other functions.

•

Touch screen interrupt function.

64-Keypad Interface

The keypad circuitry scans an 8 x 8 array of 64 normally

open, single pole switches. Any one or two keys

depressed will be de-bounced and decoded. An interrupt

is generated whenever a stable set of depressed keys is

detected. If the keypad is not utilized, the 16 column/row

pins may be used as general purpose I/O. The Keypad

interface:

•

Provides scanning, debounce and decoding for a 64-

key array.

•

Scans an 8-row by 8-column matrix.

•

May decode 2 keys at once.

•

Generates an interrupt when a new stable key is

determined.

•

Also generates a 3-key reset interrupt.

Table E. LCD Interface Pin Assignments

Pin Mnemonic

Pin Description

SPCLK

Pixel Clock

P[17:0]

Pixel Data Bus [17:0]

HSYNC/LP

Horizontal

Synchronization/Line Pulse

VCSYNC/FP

Vertical or Composite

Synchronization / Frame Pulse

BLANK

Composite Blank

BRIGHT

Pulse Width Modulated Brightness

Table F. Touch Screen Interface with 12-bit Analog-to-Digital

Converter Pin Assignments

Pin Mnemonic

Pin Description

Xp, Xm

Touch screen ADC X Axis

Yp, Ym

Touch screen ADC Y Axis

SXp, SXm

Touch screen ADC X Axis

Voltage Feedback

SYp, SYm

Touch screen ADC Y Axis

Voltage Feedback

Table G. 64-Key Keypad Interface Pin Assignments

Pin Mnemonic

Description

Alternative Usage

COL[7:0]

Key Matrix Column

Inputs

General Purpose I/O

ROW[7:0]

Key Matrix Row

Inputs

General Purpose I/O

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