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HCS412T Datasheet(PDF) 25 Page - Microchip Technology

No. de pieza HCS412T
Descripción Electrónicos  KEELOQ Code Hopping Encoder and Transponder
PDF  44 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

HCS412T Datasheet(HTML) 25 Page - Microchip Technology

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© 2002 Microchip Technology Inc.
Preliminary
DS41099C-page 25
HCS412
FIGURE 4-9:
PROGRAM SEQUENCE - CONSECUTIVE WORDS
FIGURE 4-10: PROGRAMMING - VERIFICATION
4.3.6
IFF CHALLENGE AND RESPONSE
The transponder reader sends one of four possible IFF
commands indicating which crypt key and which algo-
rithm to use to encrypt the challenge (Table 4-7).
The command is followed by the 32-bit challenge, typi-
cally a random number. The HCS412 encrypts the
challenge using the designated crypt key and algorithm
and responds with the 32-bit encrypted result. The
reader authenticates the response by comparing it to
the expected value.
The second crypt key and the seed value occupy the
same EEPROM storage area. To use the second crypt
key for IFF, the Seed Enable (SEED) and the Tempo-
rary Seed Enable (TMPSD) configuration options must
be disabled.
TABLE 4-7:
CHALLENGE AND RESPONSE COMMANDS
Communication from reader to HCS412
Communication from HCS412 to reader
Write 18x16-bit
words total.
Start
Verify
Communication from reader to HCS412
Communication from HCS412 to reader
Write 18x16-bit
words total.
Verify 18x16-bit
words total.
0
1
01b Preamble
Start
1 LFTE
16-bit
Response
3LFTE Delay between
each 16-bit word
Approximately 1ms
delay before verify
begins.
Note: If seed transmissions are not appropriately
disabled, the HCS412 will default to using
KEY1 for IFF.
Command
Description
Expected data In
Response
10000
IFF using key-1 and IFF algorithm
32-Bit Challenge
32-Bit Response
10001
IFF using key-1 and HOP algorithm
32-Bit Challenge
32-Bit Response
10100
IFF using key-2 and IFF algorithm
32-Bit Challenge
32-Bit Response
10101
IFF using key-2 and HOP algorithm
32-Bit Challenge
32-Bit Response



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