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MMA8652FC Datasheet(PDF) 53 Page - NXP Semiconductors

No. de pieza MMA8652FC
Descripción Electrónicos  MMA8652FC, 3-Axis, 12-bit, Digital Accelerometer
PDF  65 Pages
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Fabricante Electrónico  NXP [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo NXP - NXP Semiconductors

MMA8652FC Datasheet(HTML) 53 Page - NXP Semiconductors

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MMA8652FC
Sensors
Freescale Semiconductor, Inc.
53
DR[2:0] bits select the Output Data Rate (ODR) for acceleration samples in WAKE mode. The default value is 000 for a data rate
of 800 Hz.
The ACTIVE bit selects between STANDBY mode and ACTIVE mode.
The F_Read bit selects between normal and Fast Read mode.
When selected, the auto-increment counter will skip over the LSB data bytes.
Data read from the FIFO will skip over the LSB data, reducing the acquisition time.
Note that F_READ can only be changed when FMODE = 00.
The F_READ bit applies for both the output registers and the FIFO.
Table 95. SLEEP mode rates
ASLP_RATE1
ASLP_RATE0
Frequency (Hz)
Notes
00
50
When the device is in Auto-SLEEP mode, the system ODR and the
data rate for all the system functional blocks are overridden by the data
rate set by the ASLP_RATE field.
0
1
12.5
1
0
6.25
1
1
1.56
Table 96. System output data-rate selection
DR2
DR1
DR0
ODR
(Hz)
Period
(ms)
Notes
0
0
0
800
1.25
default
0
0
1
400
2.5
0
1
0
200
5
0
1
1
100
10
1
0
0
50
20
1
0
1
12.5
80
1
1
0
6.25
160
1
1
1
1.56
640
Table 97. Full-Scale selection using ACTIVE bit
Active bit
Mode
0
STANDBY (default)
1ACTIVE



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