| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
ADC32RF83 Datasheet(PDF) 46 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
ADC32RF83 Datasheet(HTML) 46 Page - Texas Instruments |
|
46 / 138 page ![]() u NCO 16 2949.12 MSPS f 38230 1720.35 MHz 2 u S NCO 16 DDCxNCOy f f 2 46 ADC32RF80, ADC32RF83 SBAS774A – MAY 2016 – REVISED DECEMBER 2016 www.ti.com Product Folder Links: ADC32RF80 ADC32RF83 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated The complex exponential sequence is multiplied by the real input from the ADC to mix the desired carrier down to 0 Hz. Each ADC channel has two DDCs. The first DDC has three NCOs and the second DDC has one NCO. The first DDC can dynamically select one of the three NCOs based on the GPIO pin or SPI selection. In wide-bandwidth mode (lower decimation factors, for example, 4 and 6), there can only be one DDC for each ADC channel. The NCO frequencies can be programmed independently through the DDCx, NCO[4:1], and the MSB and LSB register settings. The NCO frequency setting is set by the 16-bit register value given by Equation 3: where • x = 0, 1 • y = 1 to 4 (3) For example: If fS = 2949.12 MSPS, then the NCO register setting = 38230 (decimal). Thus, fNCO is defined by Equation 4: (4) Any register setting changes that occur after the JESD204B interface is operational results in a non-deterministic NCO phase. If a deterministic phase is required, the JESD204B interface must be reinitialized after changing the register setting. 8.3.5 NCO Switching The first DDC (DDC0) on each ADC channel provides three different NCOs that can be used for phase-coherent frequency hopping. This feature is available in both single-band and dual-band mode, but only affects DDC0. The NCOs can be switched through an SPI control or by using the GPIO pins with the register configurations shown in Table 6 for channel A (50xxh) and channel B (58Xxh). The assignment of which GPIO pin to use for INSEL0 and INSEL1 is done based on Table 7, using registers 5438h and 5C38h. The NCO selection is done based on the logic selection on the GPIO pins; see Table 8 and Figure 121. Table 6. NCO Register Configurations REGISTER ADDRESS DESCRIPTION NCO CONTROL THROUGH GPIO PINS NCO SEL pin 500Fh, 580Fh Selects the NCO control through the SPI (default) or a GPIO pin. INSEL0, INSEL1 5438h, 5C38h Selects which two GPIO pins are used to control the NCO. NCO CONTROL THROUGH SPI CONTROL NCO SEL pin 500Fh, 580Fh Selects the NCO control through the SPI (default) or a GPIO pin. NCO SEL 5010h, 5810h Selects which NCO to use for DDC0. Table 7. GPIO Pin Assignment INSELx[1:0] (Where x = 0 or 1) GPIO PIN SELECTED 00 GPIO4 01 GPIO1 10 GPIO3 11 GPIO2 |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |