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AD9546/PCBZ Datasheet(PDF) 171 Page - Analog Devices

No. de pieza AD9546/PCBZ
Descripción Electrónicos  Dual DPLL Digitized Clock Synchronizer
PDF  205 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD9546/PCBZ Datasheet(HTML) 171 Page - Analog Devices

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Data Sheet
AD9546
Rev. 0 | Page 171 of 205
COMPENSATION METHOD 1
Compensation Method 1 employs the open-loop method of
system clock compensation (see the Open-Loop Method
section). As shown in Figure 116, Compensation Method 1
takes the polynomial coefficients (Cx) and a temperature value
(T) to compute a compensation factor (CF1). Compensation
Method 1 differs slightly from the open-loop method by the
inclusion of a digital filter (see the Digital Filter section).
POLYNOMIAL
CALCULATOR
C0 C1 C2 C3 C4 C5
T
DIGITAL
FILTER
COEFFICIENT
OUTPUT FILTER
CUTOFF
CF1
Figure 116. Compensation Method Number 1
The coefficient values, C0 to C5, are programmed into the register
map by the user (see the Programming the Coefficients (Cx) for
Compensation Method 1 section). The temperature value comes
from the internal temperature sensor or a temperature register
(see the Temperature Sensor section for details). The CF1
compensation factor applies to the designated NCOs and TDCs
to correct for frequency variations of the system clock source.
CF1 embodies the factor, 1 + FFECOMP, shown in Figure 114.
How to Derive Coefficients from Frequency Data
To compensate for the frequency variation of the system clock
source, knowledge of the frequency vs. temperature profile is a
necessity. Generally, the temperature profile of the source is a
table of temperature values with corresponding values of the
source frequency. Table 96 shows a hypothetical example of a
25 MHz source in the two leftmost columns.
Because the AD9546 implements compensation in terms of
fractional error, it is necessary to convert the frequencies in
Table 96 to FFE values (refer to the System Clock Compensation
Overview section). Table 96 shows the resulting FFE values.
However, Compensation Method 1 generates CF1 as a time
error correction rather than a frequency error correction.
Therefore, the user must convert the FFE data to FPE data
(refer to the System Clock Compensation Overview section for
the conversion formula). Table 96 shows the resulting FPE
values. From the calculated FPE values, find the coefficients
(Cx) that best fit the FPE data, which generally involves
mathematical regression techniques using specialized
mathematical software tools.
Applying such regression techniques to the hypothetical FPE
values in Table 96 yields the following coefficients:
C0 = 1.0046936 × 10−3
C1 = −2.8927765 × 10−6
C2 = −1.9110192 × 10−7
C3 = 2.2493907 × 10−9
C4 = 2.7943570 × 10−11
C5 = −2.4817310 × 10−13
Table 96. Example 25 MHz Source Data
Temperature (°C)
Frequency (MHz)
FFE (×10−6)
FPE (×10−6)
−20
24.9757265855
−970.93658
971.88021
−10
24.9745666538
−1017.33385
1018.36987
0
24.9751062576
−995.74970
996.74220
10
24.9758628851
−965.48459
966.41766
20
24.9780535472
−877.85811
878.62943
30
24.9789426612
−842.29355
843.00361
40
24.9809631193
−761.47523
762.05552
50
24.9810049826
−759.80070
760.37843
60
24.9800392641
−798.42944
799.06744
70
24.9777091418
−891.63433
892.43005
80
24.9742106356
−1031.57458
1032.63982



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