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LP87702 Datasheet(PDF) 16 Page - Texas Instruments |
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LP87702 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 98 page ![]() 7.2 Functional Block Diagram Diagnostics UVLO SW Reset Digital Logic Registers I2C Enable/ Disable, Delay Control Slew-Rate Control Interrupts nINT SDA / EN3 SCL / EN2 EN1 VANA OTP EPROM Thermal Monitor Oscillator Buck0 ILIM Det Pwrgood Det Overload and SC Det Buck1 Boost ILIM Det Pwrgood Det Overload and SC Det ILIM Det Pwrgood Det Overload and SC Det Ref & Bias Iload ADC Iload ADC CLKIN / GPO2/ WD_DIS GPO0 Ref & Bias PG0 PG1/ GPO1 VMON1 VMON2 Window Watchdog WD_RESET WDI NRST 7.3 Feature Descriptions 7.3.1 Step-Down DC/DC Converters 7.3.1.1 Overview The LP87702 includes two high-efficiency step-down DC/DC converters. The buck converters deliver 0.7-V to 3.36-V regulated voltage rails from 2.8-V to 5.5-V input-supply voltage. The converters are designed for flexibility; most of the functions are programmable, thus optimizing the converter operation for each application: • DVS support with programmable slew rate • Automatic mode control based on the loading (PWM or PFM mode) • Forced PWM mode option • Optional external clock input to minimize crosstalk • Optional spread spectrum technique to reduce EMI • Synchronous rectification • Current mode loop with PI compensator • Soft start • Programmable output voltage monitoring with maskable interrupt and selectable connection PG0 or PG1 • Average output current sensing (for PFM entry and load current measurement) LP87702 SNVSBU3 – MARCH 2021 www.ti.com 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: LP87702 |
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