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STH2N120K5-2AG Datasheet(PDF) 3 Page - STMicroelectronics |
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STH2N120K5-2AG Datasheet(HTML) 3 Page - STMicroelectronics |
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3 / 14 page ![]() 2 Electrical characteristics (TC = 25 °C unless otherwise specified) Table 4. Static Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage VGS = 0 V, ID = 1 mA 1200 V IDSS Zero gate voltage drain current VGS = 0 V, VDS = 1200 V 0.5 µA VGS = 0 V, VDS = 1200 V, TC = 125 °C(1) 100 IGSS Gate-body leakage current VDS = 0 V, VGS = ±20 V ±100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 100 µA 2 3 4 V RDS(on) Static drain-source on-resistance VGS = 10 V, ID = 0.5 A 7.25 10 Ω 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit Ciss Input capacitance VDS = 100 V, f = 1 MHz, VGS = 0 V - 124 - pF Coss Output capacitance - 13 - Crss Reverse transfer capacitance - 0.5 - Co(tr)(1) Time-related equivalent capacitance VGS = 0 V, VDS = 0 to 960 V - 15 - pF Co(er)(2) Energy-related equivalent capacitance - 5 - RG Intrinsic gate resistance f = 1 MHz, ID = 0 A - 16 - Ω Qg Total gate charge VDD = 960 V, ID = 1.5 A, VGS = 0 to 10 V (see Figure 13. Test circuit for gate charge behavior) - 5.3 - nC Qgs Gate-source charge - 0.8 - Qgd Gate-drain charge - 3.5 - 1. Co(tr) is a constant capacitance value giving the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 2. Co(er) is a constant capacitance value giving the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 600 V, ID = 0.75 A, RG = 4.7 Ω, VGS = 10 V (see Figure 12. Test circuit for resistive load switching times and Figure 17. Switching time waveform) - 10.3 - ns tr Rise time - 7.8 - td(off) Turn-off delay time - 34 - tf Fall time - 39 - STH2N120K5-2AG Electrical characteristics DS12486 - Rev 5 page 3/14 |
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