STF8N60DM2 datasheet(4/13 Pages) STMICROELECTRONICS

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Electrical characteristics

STF8N60DM2

4/13

DocID027864 Rev 2

Electrical characteristics

(Tcase = 25 °C unless otherwise specified)

Table 5: Static

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

V(BR)DSS

Drain-source breakdown

voltage

VGS = 0 V, ID = 1 mA

600

IDSS

Zero gate voltage drain

current

VGS = 0 V, VDS = 600 V

µA

VGS = 0 V, VDS = 600 V,

Tcase = 125 °C(1)

100

IGSS

Gate-body leakage

current

VDS = 0 V, VGS = ±25 V

±5

µA

VGS(th)

Gate threshold voltage

VDS = VGS, ID = 250 µA

RDS(on)

Static drain-source on-

resistance

VGS = 10 V, ID = 4 A

550

600

mΩ

Notes:

(1)Defined by design, not subject to production test.

Table 6: Dynamic

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Ciss

Input capacitance

VDS = 100 V, f = 1 MHz,

VGS = 0 V

449

Coss

Output capacitance

Crss

Reverse transfer

capacitance

0.89

Coss eq.(1)

Equivalent output

capacitance

VDS = 0 to 480 V, VGS = 0 V

Intrinsic gate resistance

f = 1 MHz, ID = 0 A

6.5

Total gate charge

VDD = 480 V, ID = 8 A,

VGS = 10 V (see Figure 15:

"Test circuit for gate charge

behavior")

13.5

Qgs

Gate-source charge

Qgd

Gate-drain charge

7.7

Notes:

(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

increases from 0 to 80% VDSS.

Table 7: Switching times

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

td(on)

Turn-on delay time

VDD = 300 V, ID = 4 A

RG = 4.7

Ω, VGS = 10 V (see

Figure 14: "Test circuit for

resistive load switching times"

and Figure 19: "Switching time

waveform")

Rise time

td(off)

Turn-off delay time

25.4

Fall time

9.5

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