MIC2133 datasheet(24/50 Pages) MICROCHIP

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DS20006653B-page 24

MIC2133

Going out of shedding for the secondary phase will be

done at maximum speed to generate a good response

in case of a load transient.

After the phase shedding is done, the host phase

(Phase 1) will automatically allow the DCM mode if

needed by the circuit. Also, the RIP_INJ pulse will have

200 ns to keep the correct prepositioning when adding

back the Phase 2. The shedding Phase 2 will not add

any RIP_INJ pulse. When the Phase 2 is working

again, the device controller will disable the DCM mode

and go into CCM completely.

The figure below is an example of a resistance network

on the PSH pin using an NTC resistor and ensuring the

temperature compensation of phase-shedding action.

FIGURE 4-9:

Temperature Compensation

Network on the PSH Pin.

EXAMPLE 4-1:

CALCULATION of RPSH

BASED ON BOTTOM FET

CURRENT SENSING

The MIC2133 can also be used to report the average

output current via the CSH pin while working with a

PMBus™ macro. While working with a PMBus macro,

DCM and phase shedding need to be disabled through

the PSH pin. The die temperature is reported through

the TEMP pin, the input voltage is reported through the

VIN pin and the output voltage is reported via the

Output Sense (OUTS) pin while working with a PMBus

macro.

4.5.4

CURRENT LIMIT

The MIC2133 uses the RDS(ON) of the external low-side

power MOSFET to sense overcurrent conditions, or a

sense resistor inserted with the source of the bottom

FET can be used for more accurate results and does

not require temperature compensation. The bottom

FET RDS(ON) sensing method will avoid adding cost,

use of additional board space and power losses taken

by a discrete current sense resistor.

The current limit threshold can be programmed by

connecting a resistance from the ILIM pin to AGND.

Both phases use the same current limit threshold.

FIGURE 4-10:

MIC2133 Current-Limiting

Circuit.

The MIC2133 forces a constant 9.6 µA current through

the resistor tied from the ILIM pin to AGND to program

VILIM.

• Supposing that a 25°C nominal load current

generates a voltage drop of VDS = 75 mV at 25°C

on the bottom FET used for sensing current.

• Then, for that level of nominal load,

VDROOP = 8 * 75 mV = 600 mV at 25°C.

•VDROOP ≈1.2V at 125°C in the defined case

above because the RDSON is 2x greater and

VDS =150 mV at 125°C.

• In the case of wanting to shed the secondary phase

at 0.5 * nominal load, then the shedding threshold at

25°C needs to be +300 mV. It will become +600 mV

at 125°C if it is temperature compensated.

•From Equation 4-13, it can be derived that the

imposed VPSH = 1.2V – 1.25 * 0.3V = 0.825V at

25°C. From Equation 4-14,

RPSH = 0.825V/10 µA = 82.5 kΩ at 25°C.

• At 125°C, the necessary shedding threshold is

600 mV, which requires

VPSH = 1.2V – 1.25 * 0.6V = 0.45V at 125°C and the

programming resistor on the PSH pin,

RPSH = 0.45V/10 µA = 45 kΩ at 125°C. Then, the

temperature compensation network with the NTC

resistor can be linearized based on the RPSH values

at 25°C and 125°C.

SW2

CSN2

VIN

ILIM

DL2

DH2

MIC2133

VILIM

CSP2

PGND

ICL

VDD

1.2V

RILIM

0.25

SW1

CSN1

VIN

DL1

DH1

CSP1

VOUT

CH1 SHORT

COMPARATOR

CH2 SHORT

COMPARATOR

SHORT LIMIT 1

SHORT LIMIT 2

SHORT LIMIT &

HICCP CONTROL

SS CONTROL

DRIVERS

CONTROL LOGIC

DL2

DL1

DH1

DH2

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