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STM32H7B3AI Datasheet(PDF) 125 Page - STMicroelectronics |
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STM32H7B3AI Datasheet(HTML) 125 Page - STMicroelectronics |
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125 / 238 page  Symbol Parameter Min(1) Max(1) Unit tsu(Data_NOE) ns Data to FMC_NOEx high setup time 11 - th(Data_NOE) Data hold time after FMC_NOE high 0 - th(Data_NE) Data hold time after FMC_NEx high 0 - tv(NADV_NE) FMC_NEx low to FMC_NADV low - 0 tw(NADV) FMC_NADV low time - Tfmc_ker_ck + 1 1. Guaranteed by characterization results. Table 73. Asynchronous non-multiplexed SRAM/PSRAM/NOR read-NWAIT timings NWAIT pulse width is equal to 1 AHB cycle. Symbol Parameter Min(1) Max(1) Unit tw(NE) FMC_NE low time 7Tfmc_ker_ck +1 7Tfmc_ker_ck +1 ns tw(NOE) FMC_NWE low time 5Tfmc_ker_ck −1 5Tfmc_ker_ck +1 tw(NWAIT) FMC_NWAIT low time Tfmc_ker_ck −1 −0.5 - tsu(NWAIT_NE) FMC_NWAIT valid before FMC_NEx high 4Tfmc_ker_ck +9 - th(NE_NWAIT) FMC_NEx hold time after FMC_NWAIT invalid 3Tfmc_ker_ck+12 - 1. Guaranteed by characterization results. STM32H7B3xI Operating conditions DS13139 - Rev 8 page 125/238 |
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