AM79C874VC datasheet(17/60 Pages) AMD

17 / 60 page

Am79C874

P R E L I M INARY

Figure 1.

FXT± and FXR± Termination for 100BASE-FX

For 100BASE-FX operation, the NetPHY-1LP device

receives a PECL data stream from the fiber optic trans-

ceiver and decodes that data stream.

The 100BASE-X block consists of the following sub-

blocks:

— Transmit Process

— Receive Process

— 4B/5B Encoder and Decoder

— Scrambler/Descrambler

— Link Monitor

— Far End Fault Generation and Detection & Code-

Group Generator

— MLT-3 encoder/decoder with Adaptive

Equalization

— Baseline Restoration

— Clock Recovery

Transmit Process

The transmit process generates code-groups based on

the transmit control and data signals on the MII. This

process is also responsible for frame encapsulation

into a Physical Layer Stream, generating the collision

signal based on whether a carrier is received simulta-

neously during transmission and generating the Carrier

Sense CRS and Collision COL signals at the MII. The

transmit process is implemented in compliance with the

transmit state diagram as defined in Clause 24 of the

IEEE 802.3u specification.

The NetPHY-1LP device transmit function converts

synchronous 4-bit data nibbles from the MII to a 125-

Mbps differential serial data stream. The entire opera-

tion is synchronous to a 25-MHz clock and a 125-MHz

clock. Both clocks are generated by an on-chip PLL

clock synthesizer that is locked to an external 25-MHz

clock source.

In 100BASE-FX mode, the NetPHY-1LP device will by-

pass the scrambler. The output data is an NRZI PECL

signal. This PECL level signal will then drive the Fiber

transmitter.

Receive Process

The receive path includes a receiver with adaptive

equalization and DC restoration, MLT-3-to-NRZI con-

version, data and clock recovery at 125-MHz, NRZI-to-

NRZ conversion, Serial-to-Parallel conversion, de-

scrambling, and 5B to 4B decoding. The receiver circuit

starts with a DC bias for the differential RX± inputs, fol-

lows with a low-pass filter to filter out high-frequency

noise from the transmission channel media. An energy

detect circuit is also added to determine whether there

is any signal energy on the media. This is useful in the

power-saving mode. (See the description in Power

HFBR/HFCT-5903

Am79C874

NetPHY-1LP

5 RD+

4 RD-

3 SD+

10 TD-

9 TD+

3.3 V MT-RJ

1 k

Ω

3.3 V

183

Ω

183

Ω

183

Ω

183

Ω

130

Ω 130 Ω 130 Ω

0.1

µF

0.1

µF

TEST1/FXR+

TEST0/FXR-

TEST3/SDI+

FXT-

FXT+

FX_SEL

Ω

22235I-3

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