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AM79C874VC Datasheet(PDF) 38 Page - Advanced Micro Devices |
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AM79C874VC Datasheet(HTML) 38 Page - Advanced Micro Devices |
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38 / 60 page ![]() 38 Am79C874 P R E L I M INARY Power/Loopback Register (Register 19) Table 22. Power/Loopback Register (Register 19) Reg Bit Name Description Read/ Write Default 19 14:7 Reserved RW 00 19 6 TP125 Transmit transformer ratio selection: 1 = 1.25:1 0 = 1:1 The default value of this bit is controlled by reset-read value of pin 20. RW 0 19 5 Low Power Mode 1 = Enable advanced power saving mode. 0 = Disable advanced power saving mode Note: Under normal operating conditions, this mode should never be disabled. Power dissipation will exceed data sheet values, as circuitry for both 10 Mbps and 100 Mbps will be turned on. RW 1 19 4 Test Loopback 1 = Enable test loopback. Data will be transmitted from MII interface to clock recovery and loopback to MII received data. RW 0 19 3 Digital loopback 1 = Enable loopback. 0 = Normal operation. RW 0 19 2 LP_LPBK 1 = Enable link pulse loopback. 0 = Normal operation. RW 0 19 1 NLP Link Integrity Test 1 = In Auto-Negotiation test mode, send NLP instead of FLP in order to test NLP receive integrity. 0 = Sending FLP in Auto-Negotiation test mode. RW 0 19 0 Reduce Timer 1 = Reduce time constant for Auto-Negotiation timer. 0 = Normal operation. RW 0 |
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