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4LS

Electrical Characteristics

Datasheet

• PUBLIC

DS000542

• v3-01 • 2022-Nov-17

114

│ 15

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Tslew, rising

Output slew rate of

rising edge

250

750

Tslew, falling

Output slew rate of

falling edge

250

750

VODiff

Differential output

voltage

350

Characteristics for CMOS-LVTTL Outputs

VOL

Low level output

Voltage

0.6

VOH

High level output

voltage

VDDIO-0.6

VDDIO+0.3

Tslew, rising

Output slew rate of

rising edge

Tslew, falling

Output slew rate of

falling edge

Characteristics for CMOS-LVTTL Inputs

VIL

Low level input voltage

0.6

VIH

High level input voltage

VDDIO-0.6

VDDIO+0.3

Tslew, rising

Input slew rate of rising

edge

½ MCLK

Tslew, falling

Input slew rate of

falling edge

½ MCLK

TSetup

Setup time

THold

Hold time

Power Consumption (1)(2)

P15K-12-bit-1-To-1

Sensor power

consumption for the

MCLK frequencies

12-bit @

60 MHz

9.49

P10K-12-bit-1-To-1

6.36

7.4

P5K-12-bit-1-To-1

3.16

3.67

P15K-8-bit-1-To-1

8-bit @

80 MHz

9.63

11.5

P10K-8-bit-1-To-1

6.45

7.7

P5K-8-bit-1-To-1

3.21

3.85

PIDLE

(3)

0.03

0.15

(1)

Typical power values, the sensor temperature is approximately at 60 ºC.

(2)

Maximum power values considers the sensor working at the maximum line rate for at maximum temperature of 85 ºC.

(3)

Idle mode considers the sensor working after the power up of all powers, with all the sensor lines in reset.

When designing the power supply system regulators for 4LS VDDA and VDDD voltages, please take

in consideration the below respective recommended values for the current, IVDDA and IVDDD. It is given a

safe margin to not be close the minimum required.

●

4LS15K: IVDDD

≥ 2 A and IVDDA ≥ 3 A

●

4LS10K: IVDDD

≥ 1.5 A and IVDDA ≥ 2.5 A

●

4LS5K: IVDDD

≥ 1 A and IVDDA ≥ 2 A

4LS Datasheet(PDF) 16 Page - ams AG

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