Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Mexican  ▼
ALLDATASHEET.COM.MX

X  

Preview PDF HTML

WM8772SEDS/RV Datasheet(PDF) 16 Page - Wolfson Microelectronics plc

No. de pieza WM8772SEDS/RV
Descripción Electrónicos  24-bit, 192kHz 6-Channel Codec with Volume Control
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  WOLFSON [Wolfson Microelectronics plc]
Página de inicio  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8772SEDS/RV Datasheet(HTML) 16 Page - Wolfson Microelectronics plc

Back Button WM8772SEDS/RV Datasheet HTML 12Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 13Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 14Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 15Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 16Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 17Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 18Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 19Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 20Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 16 / 73 page
background image
WM8772EDS – 28 LEAD SSOP
Production Data
w
PD Rev 4.2 October 2005
16
PAGES 12 TO 36 DESCRIBE THE OPERATION OF THE WM8772EDS
28 LEAD SSOP PRODUCT VARIANT.
PAGES 37 TO 66 DESCRIBE THE OPERATION OF THE WM8772EFT
32 LEAD TQFP PRODUCT VARIANT.
WM8772EDS – 28 LEAD SSOP
MASTER CLOCK TIMING
MCLK
t
MCLKL
t
MCLKH
t
MCLKY
Figure 13 ADC and DAC Master Clock Timing Requirements
Test Conditions
AVDD, VREFP = 5V, DVDD = 3.3V, AGND, VREFN = 0V, AGND, DGND = 0V, TA = +25
oC, fs = 48kHz, DACMCLK and
ADCMCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
MCLK System clock pulse width
high
tMCLKH
11
ns
MCLK System clock pulse width
low
tMCLKL
11
ns
MCLK System clock cycle time
tMCLKY
28
ns
MCLK Duty cycle
40:60
60:40
Table 2 Master Clock Timing Requirements
DIGITAL AUDIO INTERFACE – MASTER MODE
LRC
DOUT
DIN1/2/3
WM8772
CODEC
DSP/
ENCODER/
DECODER
3
BCLK
Figure 14 Audio Interface - Master Mode



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com