Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Mexican  ▼
ALLDATASHEET.COM.MX

X  

WM8772SEDS/RV Datasheet(PDF) 27 Page - Wolfson Microelectronics plc

No. de pieza WM8772SEDS/RV
Descripción Electrónicos  24-bit, 192kHz 6-Channel Codec with Volume Control
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  WOLFSON [Wolfson Microelectronics plc]
Página de inicio  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8772SEDS/RV Datasheet(HTML) 27 Page - Wolfson Microelectronics plc

Back Button WM8772SEDS/RV Datasheet HTML 23Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 24Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 25Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 26Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 27Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 28Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 29Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 30Page - Wolfson Microelectronics plc WM8772SEDS/RV Datasheet HTML 31Page - Wolfson Microelectronics plc Next Button
Zoom Inzoom in Zoom Outzoom out
 27 / 73 page
background image
Production Data
WM8772EDS – 28 LEAD SSOP
w
PD Rev 4.2 October 2005
27
ADCLRC
ADCBCLK
DOUT
Input Word Length (IWL)
1/fs
LEFT CHANNEL
n
2
1
n-1
LSB
MSB
n
2
1
n-1
RIGHT CHANNEL
NO VALID DATA
1 BCLK
1 BCLK
Figure 29 DSP Mode Audio Interface - Mode A Master, ADC
DSP MODE B
In DSP mode B, the MSB of DAC channel 1 left data is sampled by the WM8772EDS on the first
BCLK rising edge following a LRC rising edge. DAC channel 1 right and DAC channels 2 and 3 data
follow DAC channel 1 left data (Figure 30).
Figure 30 DSP Mode Audio Interface - Mode B Slave, DAC
DACLRC
DACBCLK
DIN1
Input Word Length (IWL)
1/fs
CHANNEL 1
LEFT
n
2
1
n-1
LSB
MSB
n
2
1
n-1
CHANNEL 1
RIGHT
2
1
CHANNEL 2
LEFT
n
n-1
CHANNEL 3
RIGHT
NO VALID DATA
1
Figure 31 DSP Mode Audio Interface - Mode B Master, DAC
The MSB of the left channel ADC data is output on DOUT and changes on the same falling edge of
BCLK as the low to high LRC transition and may be sampled on the rising edge of BCLK. The right
channel ADC data is contiguous with the left channel data (Figure 32).



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com