TMP93CS41 datasheet(19/248 Pages) TOSHIBA

19 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-17

SYSCR0

Bit symbol

XEN

XTEN

RXEN

RXTEN

RSYSCK

WUEF

PRCK1

PRCK0

(006EH)

Read/Write

R/W

After reset

Function

High-

frequency

oscillator (fc)

0: Stop

1: Oscillation

Low-

frequency

oscillator (fs)

0: Stop

1: Oscillation

High-

frequency

oscillator (fc)

after

released

STOP mode

0: Stop

1: Oscillation

Low-

frequency

oscillator

(fs) after

released

STOP mode

0: Stop

1: Oscillation

Select clock

after STOP

mode is

released

0: fc

1: fs

Warm-up

timer

(Write)

0:Don’t care

1: Start timer

(Read)

0: Warm up

complete

1: Continue

warm up

Select prescaler clock

00: fFPH

01: fs

10: fc/16

11: (Reserved)

SYSCR1

Bit symbol

SYSCK

GEAR2

GEAR1

GEAR0

(006FH)

Read/Write

R/W

After reset

Function

Select

system

clock

0: fc

1: fs

Select gear value of high frequency (fc)

000: fc

001: fc/2

010: fc/4

011: fc/8

100: fc/16

101: (Reserved)

110: (Reserved)

111: (Reserved)

WDMOD

Bit symbol

WDTE

WDTP1

WDTP0

WARM

HALTM1

HALTM0

RESCR

DRVE

(005CH)

Read/Write

R/W

After reset

Function

WDT

control

1: Enable

WDT detection time

00: 2

15/fSYS

01: 2

17/fSYS

10: 2

19/fSYS

11: 2

21/fSYS

Warm-up

timer

0: 2

14/

frequency

input

1: 2

16/

frequency

input

Standby mode

00: RUN mode

01: STOP mode

10: IDLE1 mode

11: IDLE mode

1: Connects

WDT

output to

reset pin

internally.

1: Drives pin

even in

STOP

mode

CKOCR

Bit symbol

SCOSE

SCOEN

ALEEN

CLKEN

(006DH)

Read/Write

R/W

After reset

0/1 (Note 2)

Function

SCOUT

select

0: fFPH

1: fSYS

SCOUT

output

control

0: I/O port

1: SCOUT

output

ALE pin

output

control

0: HZ port

1: ALE

output

CLK pin

output

control

0: HZ port

1: CLK

output

Note 1:

SYSCR1<bit7:4> are always 1.

Note 2:

In the TMP93CS40, resetting sets the <ALEEN> and <CLKEN> bits to 0. In the TMP93CS41, resetting sets the

<ALEEN> and <CLKEN> bits to 1 (Output ALE and CLK). The CLK pin is internally pulled up during reset,

regardless of the product types.

Note 3:

Writing 0 to SYSCR1<SYSCK> enables the high-frequency oscillator regardless of the value of SYSCR0<XEN>.

Additionally, writing 1 to SYSCR1<SYSCK> enables the low-frequency oscillator regardless of the value of

SYSCR0<XTEN>.

Figure 3.3.3 I/O Register about Dual Clock, Standby

TMP93CS41 Datasheet(PDF) 19 Page - Toshiba Semiconductor

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