ADL6331ACCZB-R7 datasheet(43/54 Pages) AD

43 / 54 page

Data Sheet

ADL6331

analog.com

Rev. B | 43 of 54

Table 33. Bit Descriptions for SIG_PATH2_0

Bits

Bit Name

Description

Reset

Access

[7:3]

RESERVED

Reserved.

0x0

SIGCHAIN_BYPASS

Bypass Signal Chain Mode.

0x0

R/W

0: Based on Individual Amp Bypass Setting.

1: Bypass Both Amps.

SEL_IBIASGEN_BG

Select Bias Generator PTAT BG Reference (Debug Only).

0x0

R/W

0: Use Dedicated PTAT Generator (Default).

1: Use Bandgap Based PTAT Generator.

RESERVED

Reserved.

0x0

R/W

Address: 0x103, Reset: 0x06, Name: SIG_PATH0_1

Table 34. Bit Descriptions for SIG_PATH0_1

Bits

Bit Name

Description

Reset

Access

[7:4]

RESERVED

Reserved.

0x0

AMP1_MON_EN

Amp 1 Enable Bias Monitors.

0x0

R/W

0: Disable Bias Monitoring.

1: Enable Bias Monitoring (Debug Only).

RESERVED

Reserved.

0x1

R/W

AMP1_IM3_EN

Amp 1 Enable IM3 Trim Currents.

0x1

R/W

0: Disable IM3 Trim Currents.

1: Enable IM3 Trim Currents.

AMP1_LP_MODE

AMP1 Low Power Mode (Disables IM3 Trim).

0x0

R/W

0: Disable. Use Default Bias.

1: Enable Low Bias.

Address: 0x104, Reset: 0x89, Name: SIG_PATH1_1

Table 35. Bit Descriptions for SIG_PATH1_1

Bits

Bit Name

Description

Reset

Access

NVM_TRM_AMP1_IGREF

Select Fused Value of TRM_AMP1_IGREF.

0x1

R/W

[6:4]

RESERVED

Reserved.

0x0

[3:0]

AMP1_IGREF

Amp 1 Main Gain Bias Trim (LSB = 10mA).

0x9

R/W

ADL6331ACCZB-R7 Datasheet(PDF) 43 Page - Analog Devices

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