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STM32H523VCU6 Datasheet(PDF) 52 Page - STMicroelectronics

No. de pieza STM32H523VCU6
Descripción Electrónicos  Arm Cortex -M33 32-bit MCUTrustZone FPU, 375 DMIPS Arm Cortex -M33 32-bit MCUTrustZone FPU, 375 DMIPS
PDF  228 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32H523VCU6 Datasheet(HTML) 52 Page - STMicroelectronics

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Functional overview
STM32H523xx
52/228
DS14540 Rev 1
3.35.2
Low-power universal asynchronous receiver transmitter (LPUART)
The LPUART supports bidirectional asynchronous serial communication with minimum
power consumption. It also supports half-duplex single-wire communication and modem
operations (CTS/RTS). It allows multiprocessor communication.
Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to
9600 baud. Therefore, even in Stop mode, the LPUART can wait for an incoming frame
while having an extremely low energy consumption. Higher-speed clock can be used to
reach higher baud-rates.
The LPUART interface can be served by the DMA controller.
The LPUART main features are:
•
Full-duplex asynchronous communications
•
NRZ standard format (mark/space)
•
Programmable baud rate
•
From 300 baud/s to 9600 baud/s using a 32.768 kHz clock source
•
Higher baud rates can be achieved by using a higher frequency clock source
•
Two internal FIFOs to transmit and receive data
Each FIFO can be enabled/disabled by software and come with status flags for FIFOs
states.
•
Dual-clock domain with dedicated kernel clock for peripherals independent from PCLK
•
Programmable data word length (7 or 8 or 9 bits)
•
Programmable data order with MSB-first or LSB-first shifting
•
Configurable stop bits (1 or 2 stop bits)
•
Single-wire half-duplex communications
•
Continuous communications using DMA
•
Received/transmitted bytes are buffered in reserved SRAM using centralized DMA
•
Separate enable bits for transmitter and receiver
•
Separate signal polarity control for transmission and reception
•
Swappable Tx/Rx pin configuration
•
Hardware flow control for modem and RS-485 transceiver
•
Transfer detection flags:
–
Receive buffer full
–
Transmit buffer empty
–
Busy and end of transmission flags
•
Parity control:
–
Transmits parity bit
–
Checks parity of received data byte
•
Four error detection flags:
–
Overrun error
–
Noise detection
–
Frame error
–
Parity error
•
Interrupt sources with flags



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